Display device
    32.
    发明授权

    公开(公告)号:US11580916B2

    公开(公告)日:2023-02-14

    申请号:US17680964

    申请日:2022-02-25

    Abstract: A display device includes a substrate, a first active pattern, a first gate electrode, a second active pattern, a second gate electrode, a first connecting pattern, and a second connecting pattern. The first connecting pattern is disposed on the second active pattern and is electrically connected to the first gate electrode, and the second connecting pattern is disposed on the first connecting pattern and is electrically connected to the first connecting pattern and the second active pattern.

    Display device
    33.
    发明授权

    公开(公告)号:US11489024B2

    公开(公告)日:2022-11-01

    申请号:US17000402

    申请日:2020-08-24

    Abstract: A display device comprises a substrate including display and peripheral areas, a semiconductor element, a pixel structure, and a plurality of dummy patterns. The semiconductor element is disposed in the display area on the substrate, and the pixel structure is disposed on the semiconductor element. The dummy patterns which have stacked structure are disposed in the peripheral area on the substrate, and contain a material identical to a material constituting the semiconductor element. The dummy patterns are arranged in a grid shape in different layers, and each of the dummy patterns includes a central portion and an edge portion surrounding the central portion. The edge portions of dummy patterns which are adjacent to each other in the different layers among the dummy patterns are overlapped each other in a direction from the substrate to the pixel structure.

    Semiconductor device having separate initialization voltage lines

    公开(公告)号:US11455943B2

    公开(公告)日:2022-09-27

    申请号:US17187996

    申请日:2021-03-01

    Abstract: A display device includes a substrate, a polycrystalline semiconductor layer including a channel of a driving transistor, and a channel of a seventh transistor, a gate electrode of the driving transistor overlapping the channel thereof, a gate electrode of the seventh transistor overlapping the channel thereof, an oxide semiconductor layer including a channel of a fourth transistor, a gate electrode thereof overlapping the channel of the fourth transistor, a first initialization voltage line connected to a first electrode of the fourth transistor, the first initialization voltage line and the gate electrode of the fourth transistor being position on a same layer, and a second initialization voltage line connected to a second electrode of the seventh transistor, the second initialization voltage line and the first initialization voltage line being positioned on different layers from each other.

    Display device
    35.
    发明授权

    公开(公告)号:US11302753B2

    公开(公告)日:2022-04-12

    申请号:US16843236

    申请日:2020-04-08

    Abstract: A display device includes: a substrate that includes a first area and a second area; a plurality of pixels included in the first area; and a dummy pattern included in the second area, wherein a size of the dummy pattern is smaller than a pixel area corresponding to a first pixel among the plurality of pixels, a ratio of an area occupied by a pixel pattern of the first pixel with respect to the pixel area is a first value, a ratio of an area occupied by the dummy pattern with respect to a dummy area is a second value that is greater than the first value, and the dummy area and the pixel area have the same size as each other.

    Display device
    36.
    发明授权

    公开(公告)号:US11302268B2

    公开(公告)日:2022-04-12

    申请号:US17193281

    申请日:2021-03-05

    Abstract: A display device includes a substrate, a first active pattern, a first gate electrode, a second active pattern, a second gate electrode, a first connecting pattern, and a second connecting pattern. The first connecting pattern is disposed on the second active pattern and is electrically connected to the first gate electrode, and the second connecting pattern is disposed on the first connecting pattern and is electrically connected to the first connecting pattern and the second active pattern.

    Thin film transistor array panel and method of manufacturing the same
    40.
    发明授权
    Thin film transistor array panel and method of manufacturing the same 有权
    薄膜晶体管阵列面板及其制造方法

    公开(公告)号:US09368515B2

    公开(公告)日:2016-06-14

    申请号:US14070886

    申请日:2013-11-04

    CPC classification number: H01L27/1225 H01L27/1214 H01L27/127 H01L27/1288

    Abstract: A thin film transistor array panel may include a channel layer including an oxide semiconductor and formed in a semiconductor layer, a source electrode formed in the semiconductor layer and connected to the channel layer at a first side, a drain electrode formed in the semiconductor layer and connected to the channel layer at an opposing second side, a pixel electrode formed in the semiconductor layer in a same portion of the semiconductor layer as the drain electrode, an insulating layer disposed on the channel layer, a gate line including a gate electrode disposed on the insulating layer, a passivation layer disposed on the source and drain electrodes, the pixel electrode, and the gate line, and a data line disposed on the passivation layer. A width of the channel layer may be substantially equal to a width of the pixel electrode in a direction parallel to the gate line.

    Abstract translation: 薄膜晶体管阵列面板可以包括在半导体层中形成的氧化物半导体的沟道层,形成在半导体层中并连接到第一侧的沟道层的源电极,形成在半导体层中的漏电极和 连接到相对的第二侧的沟道层,形成在与漏电极的半导体层相同的部分中的半导体层中的像素电极,设置在沟道层上的绝缘层,设置在栅电极上的栅极线 绝缘层,设置在源电极和漏电极上的钝化层,像素电极和栅极线以及设置在钝化层上的数据线。 沟道层的宽度可以基本上等于像素电极在与栅极线平行的方向上的宽度。

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