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公开(公告)号：US11289814B2
公开(公告)日：2022-03-29
申请号：US16180822
申请日：2018-11-05
Applicant: RAYTHEON COMPANY
Inventor： Peter J. Adams , Thomas V. Sikina , John P. Haven , James E. Benedict
Abstract: The concepts, systems, circuits and techniques described herein are directed toward a spiral antenna which may be provided using additive manufacturing technology so as to provide an antenna capable of operation at frequencies which are higher than spiral antennas manufactured using standard photo-etch or printed circuit board (PCB) manufacturing processes.
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公开(公告)号：US20210360772A1
公开(公告)日：2021-11-18
申请号：US16874794
申请日：2020-05-15
Applicant: Raytheon Company
Inventor： Thomas V. Sikina , John P. Haven , James E. Benedict , William J. Clark , Channing P. Favreau , Erika Klek , Mikhail Pevzner , Donald G. Hersey , Gregory G. Beninati , Thomas J. Tellinghuisen
Abstract: Methods and apparatus for providing a cavity defined by conductive walls, a printed circuit board (PCB) within the cavity, and shorting posts extending into the cavity to suppress higher order modes generated by operation of the PCB.
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公开(公告)号：US20210337651A1
公开(公告)日：2021-10-28
申请号：US17366836
申请日：2021-07-02
Applicant: RAYTHEON COMPANY
Inventor： Andrew Southworth , Kevin Wilder , James Benedict , Mary K. Herndon , Thomas V. Sikina , John P. Haven
Abstract: A circuit assembly is provided and includes a printed circuit board (PCB) having a circuit element region and defining a trench surrounding an entirety of the circuit element region, a circuit element disposed within the circuit element region of the PCB; and a Faraday wall. The Faraday wall includes a solid, unitary body having a same shape as the trench. The Faraday wall is disposed within the trench to surround an entirety of the circuit element.
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公开(公告)号：US20210296751A1
公开(公告)日：2021-09-23
申请号：US16822399
申请日：2020-03-18
Applicant: RAYTHEON COMPANY
Inventor： JAMES BENEDICT , Erika Klek , John P. Haven , Michael Souliotis , Thomas V. Sikina , Andrew R. Southworth , Kevin Wilder
Abstract: A RAMP-radio frequency (RAMP-RF) assembly is provided and includes an RF panel including a microstrip interface, a plate including a stripline interface and a microstrip-to-stripline transition element operably connectable to the microstrip interface and to the stripline interface.
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公开(公告)号：US11107610B2
公开(公告)日：2021-08-31
申请号：US16901429
申请日：2020-06-15
Applicant: Raytheon Company , University of Massachusetts
Inventor： Erika C. Klek , Mary K. Herndon , Thomas V. Sikina , James E. Benedict , Andrew R. Southworth , Kevin M. Wilder , Oshadha K. Ranasingha , Alkim Akyurtlu
IPC: H01C7/00 , H01B3/10 , H01C17/065
Abstract: A method includes blending a dielectric material including a titanate with a carbon-based ink to form a modified carbon-based ink. The method also includes printing the modified carbon-based ink onto a structure. The method further includes curing the printed modified carbon-based ink on the structure at a temperature that does not exceed about 250° C. In addition, the method includes processing the cured printed modified carbon-based ink to form a thick film resistor. Blending the dielectric material with the carbon-based ink causes the modified carbon-based ink to have a resistivity that is at least double a resistivity of the carbon-based ink.
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Patent Agency Ranking
公开(公告)号：US20210051805A1
公开(公告)日：2021-02-18
申请号：US16541789
申请日：2019-08-15
Applicant: RAYTHEON COMPANY
Inventor： Mikhail Pevzner , James E. Benedict , Andrew R. Southworth , Thomas V. Sikina , Kevin Wilder , Matthew Souza , Aaron Michael Torberg
Abstract: An apparatus for automating the fabrication of a copper vertical launch (CVL) within a printed circuit board (PCB) includes a feed mechanism to feed and extrude copper wire from a spool of copper wire and a wire cutting and gripping mechanism to receive copper wire from the feed mechanism, cut and secure a segment of copper wire, insert the segment of copper wire into a hole formed within the PCB, solder an end of the segment of copper wire to a signal trace of the PCB, and flush cut an opposite end of the segment of the copper wire to a surface of the PCB. The wire cutting and gripping mechanism includes a wire cutter to flush cut the segment of copper wire and an integrated heated gripper device to receive the copper wire from the spool of copper wire and cut and grab a segment from copper wire.
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公开(公告)号：US10826147B2
公开(公告)日：2020-11-03
申请号：US16183169
申请日：2018-11-07
Applicant: RAYTHEON COMPANY
Inventor： Thomas V. Sikina , John P. Haven , James E. Benedict
IPC: H01P3/00 , H01P3/08 , H05K1/02 , H01P11/00 , H05K1/11 , H05K3/00 , H05K3/04 , H05K3/10 , H05K3/28
Abstract: Circuits and methods include transmission lines formed from a conductive cladding on a substrate surface. The transmission line includes additional reference conductors positioned co-planar on the surface, including a gap between the transmission line and each of the reference conductors. The transmission line and the reference conductors are at least partially encapsulated (e.g., sandwiched) between two substrates. Isolation boundaries may be included as ground planes, e.g., above and below the transmission line, on opposing surfaces of the substrates, and Faraday walls, e.g., vertically, through the substrates. Current densities generated by various electromagnetic signals are distributed among the transmission line and the reference conductors (as a tri-conductor arrangement), and may be partially further distributed to the isolation (ground) boundaries.
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公开(公告)号：US20190269007A1
公开(公告)日：2019-08-29
申请号：US16287240
申请日：2019-02-27
Applicant: RAYTHEON COMPANY
Inventor： Thomas V. Sikina , James E. Benedict , John P. Haven , Andrew R. Southworth , Semira M. Azadzoi
Abstract: A radio frequency connector includes a substrate, a first ground plane disposed upon the substrate, a signal conductor having a first contact point, with the first contact point being configured to electrically mate with a second contact point, and a first ground boundary configured to electrically mate with a second ground boundary, with the first ground boundary being formed as an electrically continuous conductor within the substrate.
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公开(公告)号：US20160156100A1
公开(公告)日：2016-06-02
申请号：US14557803
申请日：2014-12-02
Applicant: Raytheon Company
Inventor： Thomas V. Sikina , Jack J. Schuss , Joseph C. Yeh , Patrick J. Makridakis
IPC: H01Q3/26
Abstract: Methods and apparatus to calibrate an array by sequentially calibrating elements in a subarray with respect to each other using a satellite. The satellite is repeatedly illuminated for calibrating the elements using reference elements to determine plane fronts from which active elements can be calibrated with respect to each other.
Abstract translation: 通过使用卫星相对于彼此依次校准子阵列中的元件来校准阵列的方法和装置。 使用参考元件重复照亮卫星以校准元件，以确定可以相对于彼此校准有源元件的平面。
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公开(公告)号：US11990677B2
公开(公告)日：2024-05-21
申请号：US17200155
申请日：2021-03-12
Applicant: RAYTHEON COMPANY
Inventor： Thomas V. Sikina , Channing P. Favreau , Erika Klek
CPC classification number: H01Q21/0025 , H01Q21/24 , H05K1/0243 , H05K2201/10098
Abstract: A dual-polarized PCB array antenna includes one or more PCBs and a radiating antenna array. Each PCB has a PCB mounting surface that extends from a first PCB end to an opposing second PCB end. The radiating antenna array includes one or more radiator substrates. Each radiator substrate has a patch mounting surface that extends from a first substrate end to an opposing second substrate end. The dual-polarized PCB array antenna further includes one or more orthogonal interfaces configured to arrange the patch mounting surface of a given radiator substrates in an orthogonal position with respect to the PCB mounting surface of a given PCB.
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