公开(公告)号：US20190045209A1

公开(公告)日：2019-02-07

申请号：US16103622

申请日：2018-08-14

Applicant: QUALCOMM Incorporated

Inventor： Adarsh Krishnan Ramasubramonian ,  Dmytro Rusanovskyy ,  Joel Sole Rojals ,  Sungwon Lee ,  Done Bugdayci Sansli ,  Marta Karczewicz

IPC: H04N19/463 ,  H04N19/46 ,  H04N19/85 ,  H04N19/66 ,  H04N19/184 ,  H04N19/70 ,  H04N19/36 ,  H04N19/80 ,  H04N19/124 ,  H04N19/154 ,  H04N19/174 ,  H04N19/186 ,  H04N19/117 ,  H04N19/60 ,  H04N19/44

CPC classification number: H04N19/463 ,  H04N19/117 ,  H04N19/124 ,  H04N19/154 ,  H04N19/174 ,  H04N19/184 ,  H04N19/186 ,  H04N19/36 ,  H04N19/44 ,  H04N19/46 ,  H04N19/60 ,  H04N19/66 ,  H04N19/70 ,  H04N19/80 ,  H04N19/85

Abstract: This disclosure relates to processing video data, including processing video data that is represented by an HDR/WCG color representation. In accordance with one or more aspects of the present disclosure, one or more syntax structures may be used to signal syntax elements and or other information that allow a video decoder or video postprocessing device to reverse the dynamic range adjustment (DRA) techniques of this disclosure to reconstruct the original or native color representation of the video data. Dynamic range adjustment (DRA) parameters may be applied to video data in accordance with one or more aspects of this disclosure in order to make better use of an HDR/WCG color representation, and may include the use of global offset values, as well as local scale and offset values for partitions of color component values.

公开(公告)号：US10200690B2

公开(公告)日：2019-02-05

申请号：US15272172

申请日：2016-09-21

Applicant: QUALCOMM Incorporated

Inventor： Joel Sole Rojals ,  Adarsh Krishnan Ramasubramonian ,  Dmytro Rusanovskyy ,  Sungwon Lee ,  Ye-Kui Wang

IPC: H04N19/124 ,  H04N19/98 ,  H04N19/44 ,  H04N19/18 ,  H04N19/186 ,  H04N19/70 ,  H04N19/46 ,  H04N19/30 ,  H04N19/85 ,  G06F3/14 ,  G09G5/04 ,  G06T5/00 ,  H04N19/126 ,  G09G3/00 ,  G09G5/06

Abstract: In one example, a device for processing decoded video data a video decoder implemented by one or more hardware-based processing units comprising digital logic circuitry, and a postprocessing unit implemented by one or more hardware-based processing units comprising digital logic circuitry. The video decoder is configured to decode video data of a video bitsream according to a video coding standard, extract HDR postprocessing data from an SEI message of the video bitstream, and provide the decoded video data and the HDR postprocessing data to the postprocessing unit. The postprocessing unit is configured to process the decoded video data using the HDR postprocessing data according to the video coding standard. The device may additionally determine whether the video decoder is compliant with the video coding standard by comparing the processed video data with reference processed video data.

公开(公告)号：US20180359483A1

公开(公告)日：2018-12-13

申请号：US16003269

申请日：2018-06-08

Applicant: QUALCOMM Incorporated

Inventor： Yi-Wen Chen ,  Wei-Jung Chien ,  Yu-Chen Sun ,  Li Zhang ,  Sungwon Lee ,  Xiang Li ,  Hsiao-Chiang Chuang ,  Jianle Chen ,  Vadim Seregin ,  Marta Karczewicz

IPC: H04N19/52 ,  H04N19/176 ,  H04N19/44 ,  H04N19/70

Abstract: A video coder may determine a motion vector of a non-adjacent block of a current picture of the video data. The non-adjacent block is non-adjacent to a current block of the current picture. Furthermore, the video coder determines, based on the motion vector of the non-adjacent block, a motion vector predictor (MVP) for the current block. The video coder may determine a motion vector of the current block. The video coder may also determine a predictive block based on the motion vector of the current block.

公开(公告)号：US10129558B2

公开(公告)日：2018-11-13

申请号：US15269497

申请日：2016-09-19

Applicant: QUALCOMM Incorporated

Inventor： Adarsh Krishnan Ramasubramonian ,  Dmytro Rusanovskyy ,  Joel Sole Rojals ,  Sungwon Lee ,  Done Bugdayci Sansli ,  Marta Karczewicz

IPC: H04N19/66 ,  H04N19/70 ,  H04N19/46 ,  H04N19/80 ,  H04N19/85 ,  H04N19/36 ,  H04N19/44 ,  H04N19/463 ,  H04N19/184 ,  H04N19/117 ,  H04N19/124 ,  H04N19/60 ,  H04N19/186 ,  H04N19/154 ,  H04N19/174

Abstract: This disclosure relates to processing video data, including processing video data that is represented by an HDR/WCG color representation. In accordance with one or more aspects of the present disclosure, one or more Supplemental Enhancement Information (SEI) Messages may be used to signal syntax elements and or other information that allow a video decoder or video postprocessing device to reverse the dynamic range adjustment (DRA) techniques of this disclosure to reconstruct the original or native color representation of the video data. Dynamic range adjustment (DRA) parameters may be applied to video data in accordance with one or more aspects of this disclosure in order to make better use of an HDR/WCG color representation, and may include the use of global offset values, as well as local scale and offset values for partitions of color component values.

公开(公告)号：US20170085878A1

公开(公告)日：2017-03-23

申请号：US15272172

申请日：2016-09-21

Applicant: QUALCOMM Incorporated

Inventor： Joel Sole Rojals ,  Adarsh Krishnan Ramasubramonian ,  Dmytro Rusanovskyy ,  Sungwon Lee ,  Ye-Kui Wang

IPC: H04N19/124 ,  H04N19/186 ,  H04N19/18 ,  H04N19/98 ,  H04N19/44

CPC classification number: H04N19/124 ,  G06F3/1407 ,  G06T5/007 ,  G09G3/003 ,  G09G5/04 ,  G09G5/06 ,  G09G2320/0276 ,  G09G2340/06 ,  G09G2370/00 ,  H04N19/18 ,  H04N19/186 ,  H04N19/30 ,  H04N19/44 ,  H04N19/46 ,  H04N19/70 ,  H04N19/85 ,  H04N19/98

Abstract: In one example, a device for processing decoded video data a video decoder implemented by one or more hardware-based processing units comprising digital logic circuitry, and a postprocessing unit implemented by one or more hardware-based processing units comprising digital logic circuitry. The video decoder is configured to decode video data of a video bitsream according to a video coding standard, extract HDR postprocessing data from an SEI message of the video bitstream, and provide the decoded video data and the HDR postprocessing data to the postprocessing unit. The postprocessing unit is configured to process the decoded video data using the HDR postprocessing data according to the video coding standard. The device may additionally determine whether the video decoder is compliant with the video coding standard by comparing the processed video data with reference processed video data.

公开(公告)号：US20170070735A1

公开(公告)日：2017-03-09

申请号：US15260148

申请日：2016-09-08

Applicant: QUALCOMM Incorporated

Inventor： Adarsh Krishnan Ramasubramonian ,  Dmytro Rusanovskyy ,  Sungwon Lee ,  Joel Sole Rojals ,  Done Bugdayci Sansli ,  Marta Karczewicz

IPC: H04N19/124

CPC classification number: H04N19/124 ,  H04N19/186 ,  H04N19/70

Abstract: In an example, a method of processing video may include receiving a bitstream including encoded video data and a colour remapping information (CRI) supplemental enhancement information (SEI) message. The CRI SEI message may include information corresponding to one or more colour remapping processes. The method may include decoding the encoded video data to generate decoded video data. The method may include applying a process that does not correspond to the CRI SEI message to the decoded video data before applying at least one of the one or more colour remapping processes to the decoded video data to produce processed decoded video data.

Abstract translation: 在一个示例中，处理视频的方法可以包括接收包括编码视频数据和颜色重映射信息（CRI）补充增强信息（SEI）消息的比特流。 CRI SEI消息可以包括对应于一个或多个颜色重映射处理的信息。 该方法可以包括解码编码的视频数据以产生解码的视频数据。 该方法可以包括在将一个或多个颜色重映射处理中的至少一个应用于解码的视频数据之前，将与CRI SEI消息不对应的处理应用于解码的视频数据，以产生经处理的解码的视频数据。

公开(公告)号：US20160360213A1

公开(公告)日：2016-12-08

申请号：US15176014

申请日：2016-06-07

Applicant: QUALCOMM Incorporated

Inventor： Sungwon Lee ,  Joel Sole Rojals ,  Adarsh Krishnan Ramasubramonian ,  Dmytro Rusanovskyy ,  Done Bugdayci Sansli ,  Marta Karczewicz

IPC: H04N19/186 ,  H04N19/132 ,  H04N19/124

CPC classification number: H04N19/186 ,  G06T5/00 ,  G06T5/009 ,  G06T2207/20208 ,  H04N1/60 ,  H04N19/124 ,  H04N19/132 ,  H04N19/85

Abstract: In general, techniques are described for processing high dynamic range (HDR) and wide color gamut (WCG) video data for video coding. A device comprising a memory and a processor may perform the techniques. The memory may store compacted fractional chromaticity coordinate (FCC) formatted video data. The processor may inverse compact the compacted FCC formatted video data using one or more inverse adaptive transfer functions (TFs) to obtain decompacted FCC formatted video data. The processor may next inverse adjust a chromaticity component of the decompacted FCC formatted video data based on a corresponding luminance component of the decompacted FCC formatted video data to obtain inverse adjusted FCC formatted video data. The processor may convert the chromaticity component of the inverse adjusted FCC formatted video data from the FCC format to a color representation format to obtain High Dyanmic Range (HDR) and Wide Color Gamut (WCG) video data.

Abstract translation: 通常，描述了用于处理用于视频编码的高动态范围（HDR）和宽色域（WCG）视频数据的技术。 包括存储器和处理器的装置可以执行这些技术。 存储器可以存储压缩的分数色度坐标（FCC）格式的视频数据。 处理器可以使用一个或多个逆自适应传递函数（TF）对压缩的FCC格式的视频数据进行逆压缩，以获得解压缩的FCC格式的视频数据。 接下来，处理器可以基于分解的FCC格式的视频数据的对应亮度分量来反转调整分解的FCC格式的视频数据的色度分量，以获得反向调整的FCC格式的视频数据。 处理器可以将FCC调整后的FCC格式的视频数据的色度分量从FCC格式转换为颜色表示格式，以获得高分辨率范围（HDR）和宽色域（WCG）视频数据。

公开(公告)号：US09479788B2

公开(公告)日：2016-10-25

申请号：US14216205

申请日：2014-03-17

Applicant: QUALCOMM Incorporated

Inventor： In Suk Chong ,  Sungwon Lee ,  Xianglin Wang ,  Marta Karczewicz

IPC: H04N19/103 ,  H04N19/137 ,  H04N19/176 ,  H04N19/23 ,  H04N19/557 ,  H04N19/174

CPC classification number: H04N19/23 ,  H04N19/103 ,  H04N19/137 ,  H04N19/174 ,  H04N19/176 ,  H04N19/557

Abstract: Systems and methods for low complexity encoding and background detection are described herein. One aspect of the subject matter described in the disclosure provides a video encoder comprising a memory configured to store a video block. The video encoder further comprises a processor in communication with the memory. The processor is configured to determine whether the video block is background by comparing the video block to a corresponding block located in a previous temporal frame. The processor is further configured to determine, when the video block is not background, whether one or more sub-blocks of the video block are background by comparing the sub-blocks to corresponding sub-blocks located in the previous temporal frame.

Abstract translation: 本文描述了用于低复杂度编码和背景检测的系统和方法。 在本公开中描述的主题的一个方面提供了一种视频编码器，其包括被配置为存储视频块的存储器。 视频编码器还包括与存储器通信的处理器。 处理器被配置为通过将视频块与位于先前时间帧中的对应块进行比较来确定视频块是否是背景。 处理器还被配置为通过将子块与位于先前时间帧中的对应子块进行比较来确定何时视频块不是背景，视频块的一个或多个子块是否是背景。

公开(公告)号：US20160219290A1

公开(公告)日：2016-07-28

申请号：US15005736

申请日：2016-01-25

Applicant: QUALCOMM Incorporated

Inventor： Xin Zhao ,  Sungwon Lee ,  Jianle Chen ,  Li Zhang ,  Xiang Li ,  Ying Chen ,  Marta Karczewicz ,  Hongbin Liu

IPC: H04N19/44 ,  H04N19/96 ,  H04N19/52 ,  H04N19/625 ,  H04N19/593 ,  H04N19/61

CPC classification number: H04N19/159 ,  H04N19/12 ,  H04N19/136 ,  H04N19/167 ,  H04N19/176 ,  H04N19/60 ,  H04N19/70

Abstract: Example techniques are described to determine transforms to be used during video encoding and video decoding. A video encoder and a video decoder may select transform subsets that each identify one or more candidate transforms. The video encoder and the video decoder may determine transforms from the selected transform subsets.

Abstract translation: 描述示例技术来确定在视频编码和视频解码期间使用的变换。 视频编码器和视频解码器可以选择每个识别一个或多个候选变换的变换子集。 视频编码器和视频解码器可以确定来自所选择的变换子集的变换。

公开(公告)号：US20150264367A1

公开(公告)日：2015-09-17

申请号：US14216205

申请日：2014-03-17

Applicant: QUALCOMM Incorporated

Inventor： In Suk CHONG ,  Sungwon Lee ,  Xianglin Wang ,  Marta Karczewicz

IPC: H04N19/23 ,  H04N19/174

CPC classification number: H04N19/23 ,  H04N19/103 ,  H04N19/137 ,  H04N19/174 ,  H04N19/176 ,  H04N19/557

Abstract: Systems and methods for low complexity encoding and background detection are described herein. One aspect of the subject matter described in the disclosure provides a video encoder comprising a memory configured to store a video block. The video encoder further comprises a processor in communication with the memory. The processor is configured to determine whether the video block is background by comparing the video block to a corresponding block located in a previous temporal frame. The processor is further configured to determine, when the video block is not background, whether one or more sub-blocks of the video block are background by comparing the sub-blocks to corresponding sub-blocks located in the previous temporal frame.

Abstract translation: 本文描述了用于低复杂度编码和背景检测的系统和方法。 在本公开中描述的主题的一个方面提供了一种视频编码器，其包括被配置为存储视频块的存储器。 视频编码器还包括与存储器通信的处理器。 处理器被配置为通过将视频块与位于先前时间帧中的对应块进行比较来确定视频块是否是背景。 处理器还被配置为通过将子块与位于先前时间帧中的对应子块进行比较来确定何时视频块不是背景，视频块的一个或多个子块是否是背景。