公开(公告)号：US20220139021A1

公开(公告)日：2022-05-05

申请号：US17085272

申请日：2020-10-30

Applicant: QUALCOMM Incorporated

Inventor： Thomas Edwin FRISINGER ,  Richard HAMMERSTONE ,  Andrew Evan GRUBER ,  Gang ZHONG ,  Yun DU ,  Jonnala Gadda NAGENDRA KUMAR

IPC: G06T15/00 ,  G06T15/80 ,  G06T1/20 ,  G06T1/60 ,  G06F9/30

Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for fast incremental shared constants. In aspects, a CPU may determine/update shared constant data for a first draw call of a plurality of draw calls. The shared constant data, which may correspond to at least one shader, may be updated based on a draw call update for the first draw call. The CPU may communicate the updated shared constant data for the first draw call to a GPU. The GPU may receive, in at least one register, the updated shared constant data from the CPU and configure the at least one register based on the updated shared constant data corresponding to the draw call update of the first draw call of the plurality of draw calls.

公开(公告)号：US20220028155A1

公开(公告)日：2022-01-27

申请号：US16938397

申请日：2020-07-24

Applicant: QUALCOMM Incorporated

Inventor： Liang LI ,  Elina KAMENETSKAYA ,  Andrew Evan GRUBER

IPC: G06T15/04 ,  G06T15/00 ,  G06T1/20 ,  G06N20/00 ,  G06F7/544 ,  G06F7/523 ,  G06F7/50

Abstract: The present disclosure relates to methods and apparatus for configuring a texture filtering logic unit for deep learning operation. The apparatus can map one or more inputs of a deep learning operation to a respective input of a texture filtering logic unit in a graphics pipeline. Moreover, the apparatus can generate, by the texture filtering logic unit, at least one output for the deep learning operation based on the one or more inputs mapped to the texture filtering logic unit. Furthermore, the apparatus can communicate the at least one output to a programmable shader, which can analyze the output result to determine information relating to an input image based on the deep learning operation.

公开(公告)号：US20210287427A1

公开(公告)日：2021-09-16

申请号：US16816150

申请日：2020-03-11

Applicant: QUALCOMM Incorporated

Inventor： Andrew Evan GRUBER ,  Krishnaiah GUMMIDIPUDI ,  Pavan Kumar AKKARAJU ,  Kalyan Kumar BHIRAVABHATLA ,  Ankit Kumar SINGH ,  Sharad RAJ

IPC: G06T17/10 ,  G06T17/20 ,  G06T15/50 ,  G06T15/00 ,  G06T7/00 ,  G06T1/20

Abstract: The present disclosure relates to methods and apparatus for graphics processing. The present disclosure can calculate a center-edge distance of a first pixel, the center-edge distance of the first pixel equal to a distance from a first pixel center to one or more edges of a first primitive. Additionally, the present disclosure can store the center-edge distance of the first pixel when the first primitive is visible in a scene. The present disclosure can also determine an amount of overlap between the first pixel and the first primitive. Further, the present disclosure can blend a color of the first pixel with a color of a second pixel based on at least one of the center-edge distance of the first pixel or the amount of overlap between the first pixel and the first primitive.

公开(公告)号：US20240331079A1

公开(公告)日：2024-10-03

申请号：US18194324

申请日：2023-03-31

Applicant: QUALCOMM Incorporated

Inventor： Liang LI ,  Andrew Evan GRUBER

IPC: G06T1/20 ,  G06T5/00 ,  G06T5/20 ,  G06T7/40 ,  G06V10/54

CPC classification number: G06T1/20 ,  G06T5/20 ,  G06T5/77 ,  G06T7/40 ,  G06V10/54

Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for single pass anti-ringing clamping enabled image processing. A graphics processor may perform a filtering operation on a set of texture samples. The graphics processor may select, during a single sampling operation, a minimum value and a maximum value associated with the set of texture samples during the performance of the filtering operation on the set of texture samples. The graphics processor may adjust, during the single sampling operation, a value of a filtered texture sample associated with the set of texture samples based on the minimum value and the maximum value. The graphics processor may output an indication of the adjusted value of the filtered texture sample.

公开(公告)号：US20240212257A1

公开(公告)日：2024-06-27

申请号：US18145804

申请日：2022-12-22

Applicant: QUALCOMM Incorporated

Inventor： Liang LI ,  Andrew Evan GRUBER ,  Baoguang YANG

IPC: G06T15/04 ,  G06T1/20 ,  G06T15/00

CPC classification number: G06T15/04 ,  G06T1/20 ,  G06T15/005

Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for workload packing in a graphics texture pipeline. A graphics processor may combine a set of samples into one or more hardware transactions, where the set of samples is associated with at least one of a first type of texture filtering or a first type of shader requested texture format component and the one or more hardware transactions are associated with at least one of a second type of texture filtering or a second type of shader requested texture format component. The graphics processor may process, in a texture pipeline at the graphics processor, the one or more hardware transactions including the set of samples. The graphics processor may output an indication of the processed one or more hardware transactions including the set of samples.

公开(公告)号：US20240104837A1

公开(公告)日：2024-03-28

申请号：US18447155

申请日：2023-08-09

Applicant: QUALCOMM Incorporated

Inventor： Vineet GOEL ,  Andrew Evan GRUBER ,  Donghyun KIM

IPC: G06T15/80 ,  G06T15/00

CPC classification number: G06T15/80 ,  G06T15/00 ,  G06T15/005 ,  G06T17/20

Abstract: Aspects of this disclosure relate to a process for rendering graphics that includes performing, with a hardware unit of a graphics processing unit (GPU) designated for vertex shading, a vertex shading operation to shade input vertices so as to output vertex shaded vertices, wherein the hardware unit adheres to an interface that receives a single vertex as an input and generates a single vertex as an output. The process also includes performing, with the hardware unit of the GPU designated for vertex shading, a hull shading operation to generate one or more control points based on one or more of the vertex shaded vertices, wherein the one or more hull shading operations operate on at least one of the one or more vertex shaded vertices to output the one or more control points.

公开(公告)号：US20240013336A1

公开(公告)日：2024-01-11

申请号：US18245881

申请日：2020-11-19

Applicant: QUALCOMM Incorporated

Inventor： Bo DU ,  Andrew Evan GRUBER ,  Yongjun XU

IPC: G06T1/20 ,  G06T1/60

CPC classification number: G06T1/20 ,  G06T1/60

Abstract: The present disclosure relates to graphics processing. An apparatus of the present disclosure may determine visibility streams corresponding to a target and a set of bins into which the target is divided. The apparatus may select one of a first rendering mode or a second rendering mode for the target based on the first visibility stream and based on the set of second visibility streams. When the first rendering mode is select, the apparatus may configure each of the set of bins into a first subset associated with a first type of rendering pass or a second subset associated with a second type of rendering pass. The apparatus may then render the target based on the selected one of the first rendering mode or the second rendering mode and, if applicable, based on the first rendering pass type or the second rendering pass type.

公开(公告)号：US20230377240A1

公开(公告)日：2023-11-23

申请号：US17664033

申请日：2022-05-18

Applicant: QUALCOMM Incorporated

Inventor： Yun DU ,  Eric DEMERS ,  Andrew Evan GRUBER ,  Chun YU ,  Chihong ZHANG ,  Baoguang YANG ,  Yuehai DU ,  Gang ZHONG ,  Avinash SEETHARAMAIAH ,  Jonnala Gadda NAGENDRA KUMAR

IPC: G06T15/00 ,  G06T1/60

CPC classification number: G06T15/005 ,  G06T1/60

Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may receive a set of draw call instructions corresponding to a graphics workload, where the set of draw call instructions is associated with at least one run-time parameter. The apparatus may also obtain a first shader program associated with storing data in a system memory and at least one second shader program associated with storing data in a constant memory. Further, the apparatus may execute the first shader program or the at least one second shader program based on whether the at least one run-time parameter is less than or equal to a size of the constant memory. The apparatus may also update or maintain a configuration of a shader processor or a streaming processor based on executing the first shader program or the at least one second shader program.

公开(公告)号：US20230019763A1

公开(公告)日：2023-01-19

申请号：US17758219

申请日：2020-01-31

Applicant: QUALCOMM Incorporated

Inventor： Yun DU ,  Andrew Evan GRUBER ,  Chun YU ,  Chihong ZHANG ,  Thomas Edwin FRISINGER ,  Richard HAMMERSTONE ,  Zilin YING ,  Heng QI ,  Quanquan XU ,  Sheng GU

IPC: G06T1/60

Abstract: The present disclosure relates to methods and apparatus for graphics processing. For example, disclosed techniques facilitate improving bindless state processing at a graphics processor. Aspects of the present disclosure can receive, at a graphics processor, a shader program including a preamble section and a main instructions section. Aspects of the present disclosure can also execute, with a scalar processor dedicated to processing preamble sections, instructions of the preamble section to implement a bindless mechanism for loading constant data associated with the shader program. Additionally, aspects of the present disclosure can distribute the main instructions section and the constant data to a streaming processor for executing the shader program.

公开(公告)号：US20220357983A1

公开(公告)日：2022-11-10

申请号：US17315205

申请日：2021-05-07

Applicant: QUALCOMM Incorporated

Inventor： Yun DU ,  Andrew Evan GRUBER ,  Zilin YING ,  Gang ZHONG ,  Baoguang YANG ,  Yang YU ,  Yang XIA ,  Ravindra KUMAR ,  Chun YU ,  Eric DEMERS

IPC: G06F9/48 ,  G06F12/0875 ,  G06T1/20

Abstract: The present disclosure relates to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may receive a plurality of workloads based on a workload order, each of the plurality of workloads being received in the workload order including at least a first workload and a second workload. The apparatus may also allocate one or more workloads of the plurality of workloads to one or more wave slots. Additionally, the apparatus may execute the one or more allocated workloads at the one or more wave slots, such that at least the first workload is executed at the first wave slot and the second workload is executed at the second wave slot. The apparatus may also allocate at least one other workload of the plurality of workloads to at least one previously-allocated wave slot of the one or more wave slots.