公开(公告)号：US20230298123A1

公开(公告)日：2023-09-21

申请号：US17655358

申请日：2022-03-17

申请人： QUALCOMM Incorporated

发明人： Srihari Babu ALLA ,  Tao WANG ,  Andrew Evan GRUBER ,  Matthew NETSCH ,  Richard HAMMERSTONE ,  Thomas Edwin FRISINGER

IPC分类号： G06T1/20 ,  H04N19/182

CPC分类号： G06T1/20 ,  H04N19/182

摘要： This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for compatible compression for different types of image views. A graphics processor may select a first common format of a plurality of common formats for at least one image based on at least one of application data or first metadata associated with the at least one image. The graphics processor may encode the at least one image based on the selected first common format for the at least one image. The graphics processor may select a second common format for the at least one image based on second metadata of the at least one image. The second common format may be identical to the first common format. The graphics processor may decode the at least one image based on the selected second common format for the at least one image.

公开(公告)号：US20220139021A1

公开(公告)日：2022-05-05

申请号：US17085272

申请日：2020-10-30

申请人： QUALCOMM Incorporated

发明人： Thomas Edwin FRISINGER ,  Richard HAMMERSTONE ,  Andrew Evan GRUBER ,  Gang ZHONG ,  Yun DU ,  Jonnala Gadda NAGENDRA KUMAR

IPC分类号： G06T15/00 ,  G06T15/80 ,  G06T1/20 ,  G06T1/60 ,  G06F9/30

摘要： This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for fast incremental shared constants. In aspects, a CPU may determine/update shared constant data for a first draw call of a plurality of draw calls. The shared constant data, which may correspond to at least one shader, may be updated based on a draw call update for the first draw call. The CPU may communicate the updated shared constant data for the first draw call to a GPU. The GPU may receive, in at least one register, the updated shared constant data from the CPU and configure the at least one register based on the updated shared constant data corresponding to the draw call update of the first draw call of the plurality of draw calls.

公开(公告)号：US20240296153A1

公开(公告)日：2024-09-05

申请号：US18177390

申请日：2023-03-02

申请人： QUALCOMM Incorporated

发明人： Liang LI ,  Andrew Evan GRUBER ,  Jonnala Gadda NAGENDRA KUMAR ,  Thomas Edwin FRISINGER ,  Zilin YING ,  Srihari Babu ALLA

IPC分类号： G06F16/23 ,  G06F16/22

CPC分类号： G06F16/23 ,  G06F16/2282

摘要： Aspects of the disclosure are directed to metadata updating. In accordance with one aspect, an apparatus includes an external memory unit configured for storing an original descriptor tag; a descriptor loading block coupled to the external memory, the descriptor loading block configured to fetch the original descriptor tag from the external memory for storage in an internal cache memory and further configured to compare the original descriptor tag stored in the internal cache memory to each of a plurality of original base values; and a remap table database coupled to the descriptor loading block, the remap table database configured to store the plurality of original base values, a plurality of updated base values and a plurality of updated miscellaneous base values.

公开(公告)号：US20230343016A1

公开(公告)日：2023-10-26

申请号：US18245847

申请日：2020-11-18

申请人： QUALCOMM Incorporated

发明人： Srihari Babu ALLA ,  Jonnala Gadda NAGENDRA KUMAR ,  Avinash SEETHARAMAIAH ,  Andrew Evan GRUBER ,  Thomas Edwin FRISINGER ,  Richard HAMMERSTONE ,  Bo DU ,  Yongjun XU

IPC分类号： G06T15/00

CPC分类号： G06T15/005

摘要： The present disclosure relates to graphics processing. An apparatus of the present disclosure may determine visibility streams corresponding to a target and a set of bins into which the target is divided. The apparatus may select one of a first rendering mode or a second rendering mode for the target based on the first visibility stream and based on the set of second visibility streams. When the first rendering mode is select, the apparatus may configure each of the set of bins into a first subset associated with a first type of rendering pass or a second subset associated with a second type of rendering pass. The apparatus may then render the target based on the selected one of the first rendering mode or the second rendering mode and, if applicable, based on the first rendering pass type or the second rendering pass type.

公开(公告)号：US20230290034A1

公开(公告)日：2023-09-14

申请号：US18317825

申请日：2023-05-15

申请人： QUALCOMM Incorporated

发明人： Thomas Edwin FRISINGER ,  Richard HAMMERSTONE ,  Andrew Evan GRUBER ,  Gang ZHONG ,  Yun DU ,  Jonnala Gadda NAGENDRA KUMAR

IPC分类号： G06T15/00 ,  G06F9/30 ,  G06T1/20 ,  G06T1/60 ,  G06T15/80

CPC分类号： G06T15/005 ,  G06F9/30101 ,  G06F9/30123 ,  G06T1/20 ,  G06T1/60 ,  G06T15/80

摘要： This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for fast incremental shared constants. In aspects, a CPU may determine/update shared constant data for a first draw call of a plurality of draw calls. The shared constant data, which may correspond to at least one shader, may be updated based on a draw call update for the first draw call. The CPU may communicate the updated shared constant data for the first draw call to a GPU. The GPU may receive, in at least one register, the updated shared constant data from the CPU and configure the at least one register based on the updated shared constant data corresponding to the draw call update of the first draw call of the plurality of draw calls.

公开(公告)号：US20230019763A1

公开(公告)日：2023-01-19

申请号：US17758219

申请日：2020-01-31

申请人： QUALCOMM Incorporated

发明人： Yun DU ,  Andrew Evan GRUBER ,  Chun YU ,  Chihong ZHANG ,  Thomas Edwin FRISINGER ,  Richard HAMMERSTONE ,  Zilin YING ,  Heng QI ,  Quanquan XU ,  Sheng GU

IPC分类号： G06T1/60

摘要： The present disclosure relates to methods and apparatus for graphics processing. For example, disclosed techniques facilitate improving bindless state processing at a graphics processor. Aspects of the present disclosure can receive, at a graphics processor, a shader program including a preamble section and a main instructions section. Aspects of the present disclosure can also execute, with a scalar processor dedicated to processing preamble sections, instructions of the preamble section to implement a bindless mechanism for loading constant data associated with the shader program. Additionally, aspects of the present disclosure can distribute the main instructions section and the constant data to a streaming processor for executing the shader program.

公开(公告)号：US20230009205A1

公开(公告)日：2023-01-12

申请号：US17373718

申请日：2021-07-12

申请人： QUALCOMM Incorporated

发明人： Tushar GARG ,  Thomas Edwin FRISINGER ,  Nigel POOLE ,  Vishwanath Shashikant NIKAM ,  Vijay Kumar DONTHIREDDY

IPC分类号： G06T15/00 ,  G06T1/20 ,  G06F11/34

摘要： The present disclosure relates to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may process a first workload of a plurality of workloads at each of multiple clusters in a GPU pipeline. The apparatus may also increment a plurality of performance counters during the processing of the first workload at each of the multiple clusters. Further, the apparatus may determine, at each of the multiple clusters, whether the first workload is finished processing. The apparatus may also read, upon determining that the first workload is finished processing, a value of each of the multiple clusters for each of the plurality of performance counters. Additionally, the apparatus may transmit an indication of the read value of each of the multiple clusters for all of the plurality of performance counters.

公开(公告)号：US20220101479A1

公开(公告)日：2022-03-31

申请号：US17039873

申请日：2020-09-30

申请人： QUALCOMM Incorporated

发明人： Srihari Babu ALLA ,  Jonnala Gadda NAGENDRA KUMAR ,  Avinash SEETHARAMAIAH ,  Andrew Evan GRUBER ,  Richard HAMMERSTONE ,  Thomas Edwin FRISINGER ,  Daniel ARCHARD

IPC分类号： G06T1/20 ,  G06T1/60

摘要： The present disclosure relates to methods and apparatus for hybrid rendering of video/graphics content by a graphics processing unit. The apparatus can configure the graphics processing unit of a display apparatus to perform multiple rendering passes for a frame of a scene to be displayed on a display device. Moreover, the apparatus can control the graphics processing unit to perform a first rendering pass of the multiple rendering passes to generate a first render target that is stored in either an on-chip graphics memory of the GPU or a system of the display apparatus. The apparatus can also control the graphics processing unit to perform a second rendering pass to generate a second render target that is alternatively stored in the system memory of the display apparatus or on-chip graphics memory of the GPU.