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公开(公告)号:US10972687B2
公开(公告)日:2021-04-06
申请号:US16870159
申请日:2020-05-08
Applicant: OmniVision Technologies, Inc.
Inventor: Sohei Manabe , Keiji Mabuchi
IPC: H01L27/146 , H04N5/353 , H04N5/374 , G01S7/4863 , H04N5/378 , H04N13/254 , G01S17/894
Abstract: An image sensor including a photodiode, a first doped region, a second doped region, a first storage node, a second storage node, a first vertical transfer gate, and a second vertical transfer gate is presented. The photodiode is disposed in a semiconductor material to convert image light to an electric signal. The first doped region and the second doped region are disposed in the semiconductor material between a first side of the semiconductor material and the photodiode. The first doped region is positioned between the first storage node and the second storage node while the second doped region is positioned between the second storage node and the first doped region. The vertical transfer gates are coupled between the photodiode to transfer the electric signal from the photodiode to a respective one of the storage nodes in response to a signal.
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公开(公告)号:US20200264309A1
公开(公告)日:2020-08-20
申请号:US16870159
申请日:2020-05-08
Applicant: OmniVision Technologies, Inc.
Inventor: Sohei Manabe , Keiji Mabuchi
IPC: G01S17/89 , H01L27/146 , H04N5/374 , G01S7/4863 , H04N5/378 , H04N13/254
Abstract: An image sensor including a photodiode, a first doped region, a second doped region, a first storage node, a second storage node, a first vertical transfer gate, and a second vertical transfer gate is presented. The photodiode is disposed in a semiconductor material to convert image light to an electric signal. The first doped region and the second doped region are disposed in the semiconductor material between a first side of the semiconductor material and the photodiode. The first doped region is positioned between the first storage node and the second storage node while the second doped region is positioned between the second storage node and the first doped region. The vertical transfer gates are coupled between the photodiode to transfer the electric signal from the photodiode to a respective one of the storage nodes in response to a signal.
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公开(公告)号:US20190356872A1
公开(公告)日:2019-11-21
申请号:US15983954
申请日:2018-05-18
Applicant: OmniVision Technologies, Inc.
Inventor: Sohei Manabe , Keiji Mabuchi
IPC: H04N5/353 , H04N5/378 , H04N5/3745 , H04N5/355
Abstract: An image sensor includes a photodiode disposed in a semiconductor material to generate image charge in response to incident light, and a first transfer gate is coupled to the photodiode to extract image charge from the photodiode in response to a first transfer signal. A first storage gate is coupled to the first transfer gate to receive the image charge from the first transfer gate, and a first output gate is coupled to the first storage gate to receive the image charge from the first storage gate. A first capacitor is coupled to the first output gate to store the image charge.
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公开(公告)号:US10134788B2
公开(公告)日:2018-11-20
申请号:US14029515
申请日:2013-09-17
Applicant: OmniVision Technologies, Inc.
Inventor: Jeong-Ho Lyu , Sohei Manabe
IPC: H01L31/00 , H01L27/146 , H04N5/355 , H04N5/3745
Abstract: A CMOS photodiode device for use in a dual-sensitivity imaging pixel contains at least two areas of differential doping. Transistors are provided in electrical contact with these areas to govern operation of signals emanating from the photodiode on two channels, each associated with a different sensitivity to light. A plurality of such photodiodes may be incorporate into a shared arrangement forming a single pixel, in order to enhance the signals.
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公开(公告)号:US20180302579A1
公开(公告)日:2018-10-18
申请号:US15485534
申请日:2017-04-12
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor: Sohei Manabe , Keiji Mabuchi , Takayuki Goto , Duli Mao , Hiroaki Ebihara , Kazufumi Watanabe
IPC: H04N5/355 , H04N5/378 , H04N5/3745 , H01L27/146
CPC classification number: H04N5/3559 , H01L27/14609 , H01L27/1461 , H01L27/14612 , H01L27/14634 , H01L27/14636 , H01L27/14643 , H04N5/37452 , H04N5/378
Abstract: A pixel circuit for use in a high dynamic range (HDR) image sensor includes a photodiode and a floating diffusion is disposed in the first semiconductor wafer. A transfer transistor is disposed in the first semiconductor wafer and is adapted to be switched on to transfer the charge carriers photogenerated in the photodiode to the floating diffusion. An in-pixel capacitor is disposed in a second semiconductor wafer. The first semiconductor wafer is stacked with and coupled to the second semiconductor wafer. A dual floating diffusion (DFD) transistor is disposed in the first semiconductor wafer. The in-pixel capacitor is selectively coupled to the floating diffusion through the DFD transistor. The floating diffusion is set to low conversion gain in response to the in-pixel capacitor being coupled to the floating diffusion, and high conversion gain in response to the in-pixel capacitor being decoupled from the floating diffusion.
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公开(公告)号:US09967504B1
公开(公告)日:2018-05-08
申请号:US15480833
申请日:2017-04-06
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor: Sohei Manabe , Keiji Mabuchi , Takayuki Goto , Gang Chen
IPC: H04N5/374 , H04N5/378 , H01L27/146
CPC classification number: H04N5/378 , H01L27/14605 , H01L27/1463 , H01L27/14643 , H04N5/374
Abstract: A pixel circuit for use in an image sensor includes an unpinned photodiode disposed in a semiconductor material. The unpinned photodiode adapted to photogenerate charge carriers in response to incident light. A floating diffusion is disposed in the semiconductor and coupled to receive the charge carriers photogenerated in the unpinned photodiode. A transfer transistor is disposed in the semiconductor material and coupled between the unpinned photodiode and the floating diffusion. The transfer transistor is adapted to be switched on to transfer the charge carriers photogenerated in the unpinned photodiode to the floating diffusion. A boost capacitor is disposed over a surface of the semiconductor material proximate to the unpinned photodiode. The boost capacitor is coupled to receive a photodiode boost signal while the transfer transistor is switched on to further drive the charge carriers photogenerated in the unpinned photodiode to the floating diffusion.
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公开(公告)号:US20180097030A1
公开(公告)日:2018-04-05
申请号:US15284961
申请日:2016-10-04
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor: Sohei Manabe , Keiji Mabuchi , Takayuki Goto , Vincent Venezia , Boyd Albert Fowler , Eric A. G. Webster
IPC: H01L27/146
CPC classification number: H01L27/14634 , H01L27/14612 , H01L27/14632 , H01L27/14636 , H01L27/14643 , H01L27/1469
Abstract: An image sensor includes a pixel array having plurality of pixel cells arranged into a plurality of rows and a plurality of columns of pixel cells in a first semiconductor die. A plurality of pixel support circuits are arranged in a second semiconductor die that is stacked and coupled together with the first semiconductor die. A plurality of interconnect lines are coupled between the first and second semiconductor dies, and each one of the plurality of pixel cells is coupled to a corresponding one of the plurality of pixel support circuits through a corresponding one plurality of interconnect lines. A plurality of shield bumps are disposed proximate to corners of the pixel cells in the pixel array and between the first and second semiconductor dies such that each one of the plurality of shield bumps is disposed between adjacent interconnect lines along a diagonal of the pixel array.
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公开(公告)号:US09923024B1
公开(公告)日:2018-03-20
申请号:US15607309
申请日:2017-05-26
Applicant: OmniVision Technologies, Inc.
Inventor: Keiji Mabuchi , Sohei Manabe , Duli Mao
IPC: H01L27/148 , H01L27/146
CPC classification number: H01L27/14812 , H01L27/14634
Abstract: An imaging sensor pixel comprises a highly resistive N− doped semiconductor layer with a front side and a back side. At the front side, there are at least a light sensing region, a transfer gate adjacent to the light sensing region and a P-well region. The P-well region surrounds the light sensing region and the transfer gate region, and comprises at least a floating diffusion region and a first electrode outside of the floating diffusion region, wherein a first negative voltage is applied to the first electrode. The transfer gate couples between the light sensing region and the floating diffusion region. At the back side, there is a back side P+ doped layer comprising a second electrode formed on the back side P+ doped layer, wherein a second negative voltage is applied to the second electrode. The second negative voltage is more negative than the first negative voltage.
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公开(公告)号:US20180041723A1
公开(公告)日:2018-02-08
申请号:US15228874
申请日:2016-08-04
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor: Keiji Mabuchi , Dyson H. Tai , Oray Orkun Cellek , Duli Mao , Sohei Manabe
IPC: H04N5/355 , H01L27/146 , H04N9/04 , H04N5/378 , H04N5/3745
Abstract: A pixel array for use in a high dynamic range image sensor includes a plurality of pixels arranged in a plurality of rows and columns in the pixel array. Each one of the pixels includes a linear subpixel and a log subpixel disposed in a semiconductor material. The linear subpixel is coupled to generate a linear output signal having a linear response, and the log subpixel is coupled to generate a log output signal having a logarithmic response in response to the incident light. A bitline is coupled to the linear subpixel and to the log subpixel to receive the linear output signal and the log output signal. The bitline is one of a plurality of bitlines coupled to the plurality of pixels. Each one of the plurality of bitlines is coupled to a corresponding grouping of the plurality of pixels.
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公开(公告)号:US20170180663A1
公开(公告)日:2017-06-22
申请号:US14979058
申请日:2015-12-22
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor: Keiji Mabuchi , Sohei Manabe
CPC classification number: H04N5/37455 , H01L27/14634 , H04N5/345 , H04N5/369 , H04N5/374 , H04N5/378
Abstract: High speed rolling image sensor includes pixel array disposed in first semiconductor die, readout circuits disposed in second semiconductor die and conductors. Pixel array is partitioned into pixel sub-arrays (PSAs). Each of the PSAs includes a plurality of pixels. Pixel groups include pixels that are non-contiguous, non-overlapping and distinct. Each pixel group includes pixels from different PSAs. Each pixel group is coupled to a corresponding analog-to-digital converter and memory unit tiles (ADMs) respectively included in readout circuits. ADMs respectively include (i) analog-to-digital (ADC) circuits that convert the image data from pixel groups from analog to digital to obtain ADC outputs, and (ii) memory units to store ADC outputs. Conductors are coupling pixel array to ADMs. Conductors include number of conductors per column of pixel array. Number of conductors per column of pixel array may be equal to number of pixels in PSA arranged in same column. Other embodiments are described.
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