Patent search ap:("OMNIVISION TECHNOLOGIES Page INC.") AND inv:"Howard E. Rhodes"

31.

发明授权
Lateral light shield in backside illuminated imaging sensors 有权
Title translation: 背面照明成像传感器的侧面防护罩

公开(公告)号：US09177982B2

公开(公告)日：2015-11-03

申请号：US14319807

申请日：2014-06-30

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Duli Mao , Dyson H. Tai , Vincent Venezia , Yin Qian , Gang Chen , Howard E. Rhodes

IPC: H01L27/146

CPC classification number: H01L27/1462 , H01L27/14623 , H01L27/1464 , H01L27/14685

Abstract: A backside illuminated image sensor includes a semiconductor layer and a trench disposed in the semiconductor layer. The semiconductor layer has a frontside surface and a backside surface. The semiconductor layer includes a light sensing element of a pixel array disposed in a sensor array region of the semiconductor layer. The pixel array is positioned to receive external incoming light through the backside surface of the semiconductor layer. The semiconductor layer also includes a light emitting element disposed in a periphery circuit region of the semiconductor layer external to the sensor array region. The trench is disposed in the semiconductor layer between the light sensing element and the light emitting element.

Abstract translation: 背面照明图像传感器包括设置在半导体层中的半导体层和沟槽。半导体层具有前表面和背面。半导体层包括设置在半导体层的传感器阵列区域中的像素阵列的光感测元件。像素阵列被定位成接收穿过半导体层的背面的外部入射光。半导体层还包括设置在传感器阵列区域外部的半导体层的外围电路区域中的发光元件。沟槽设置在光感测元件和发光元件之间的半导体层中。

32.

发明授权
Die seal ring for integrated circuit system with stacked device wafers 有权
Title translation: 具有堆叠器件晶圆的集成电路系统的模具密封环

公开(公告)号：US09142581B2

公开(公告)日：2015-09-22

申请号：US13669107

申请日：2012-11-05

Applicant: OmniVision Technologies, Inc.

Inventor： Yin Qian , Hsin-Chih Tai , Tiejun Dai , Duli Mao , Cunyu Yang , Howard E. Rhodes

IPC: H01L27/146 , H01L23/58 , H01L23/00

CPC classification number: H01L27/1469 , H01L21/76898 , H01L23/481 , H01L23/585 , H01L24/05 , H01L24/08 , H01L24/94 , H01L27/14618 , H01L27/14636 , H01L27/14683 , H01L27/14689 , H01L2224/04042 , H01L2224/05567 , H01L2224/08145 , H01L2224/80896 , H01L2224/9202 , H01L2224/9212 , H01L2224/94 , H01L2924/00014 , H01L2924/10253 , H01L2924/10329 , H01L2924/12043 , H01L2924/1434 , H01L2924/37001 , H01L2224/80 , H01L2224/05552 , H01L2924/00 , H01L2224/8203 , H01L2224/821 , H01L2224/80001 , H01L2224/82

Abstract: An integrated circuit system includes a first device wafer bonded to a second device wafer at a bonding interface of dielectrics. Each wafer includes a plurality of dies, where each die includes a device, a metal stack, and a seal ring that is formed at an edge region of the die. Seal rings included in dies of the second device wafer each include a first conductive path provided with metal formed in a first opening that extends from a backside of the second device wafer, through the second device wafer, and through the bonding interface to the seal ring of a corresponding die in the first device wafer.

Abstract translation: 集成电路系统包括在电介质的接合界面处结合到第二器件晶片的第一器件晶片。每个晶片包括多个模具，其中每个模具包括形成在模具的边缘区域处的装置，金属堆叠和密封环。包括在第二器件晶片的管芯中的密封圈各自包括设置有金属的第一导电路径，所述第一导电路径形成在从第二器件晶片的背面延伸穿过第二器件晶片的第一开口中，并且通过接合界面到达密封环在第一器件晶片中的相应管芯。

33.

发明申请
IMAGE SENSOR PIXEL CELL WITH SWITCHED DEEP TRENCH ISOLATION STRUCTURE 有权
Title translation: 具有开关深度分离隔离结构的图像传感器像素单元

公开(公告)号：US20150236058A1

公开(公告)日：2015-08-20

申请号：US14704493

申请日：2015-05-05

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Sing-Chung Hu , Rongsheng Yang , Gang Chen , Howard E. Rhodes , Sohei Manabe , Dyson H. Tai

IPC: H01L27/146 , H04N5/378

CPC classification number: H01L27/1463 , H01L27/14601 , H01L27/14607 , H01L27/14612 , H01L27/1464 , H01L27/14643 , H04N5/378

Abstract: A pixel cell includes a photodiode disposed in an epitaxial layer in a first region of semiconductor material to accumulate image charge. A floating diffusion is disposed in a well region disposed in the epitaxial layer in the first region. A transfer transistor is coupled to selectively transfer the image charge from the photodiode to the floating diffusion. A deep trench isolation (DTI) structure disposed in the semiconductor material. The DTI structure isolates the first region of the semiconductor material on one side of the DTI structure from a second region of the semiconductor material on an other side of the DTI structure. The DTI structure includes a doped semiconductor material disposed inside the DTI structure that is selectively coupled to a readout pulse voltage in response to the transfer transistor selectively transferring the image charge from the photodiode to the floating diffusion.

Abstract translation: 像素单元包括设置在半导体材料的第一区域中的外延层中以累积图像电荷的光电二极管。浮置扩散部设置在设置在第一区域的外延层中的阱区域中。耦合转移晶体管以选择性地将图像电荷从光电二极管转移到浮动扩散。设置在半导体材料中的深沟槽隔离（DTI）结构。 DTI结构将DTI结构的一侧上的半导体材料的第一区域与DTI结构的另一侧上的半导体材料的第二区域隔离。 DTI结构包括设置在DTI结构内部的掺杂半导体材料，其被选择性地耦合到读出脉冲电压，响应于传输晶体管选择性地将图像电荷从光电二极管传输到浮动扩散。

34.

发明申请
DUAL-FACING CAMERA ASSEMBLY 审中-公开
Title translation: 双面相机组件

公开(公告)号：US20150054106A1

公开(公告)日：2015-02-26

申请号：US14528991

申请日：2014-10-30

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Gang Chen , Ashish Shah , Duli Mao , Hsin-Chih Tai , Howard E. Rhodes

IPC: H01L27/146

CPC classification number: H01L27/14645 , H01L27/14605 , H01L27/1462 , H01L27/14621 , H01L27/14627 , H01L27/14634 , H01L27/14636 , H01L27/1464 , H01L27/1469

Abstract: Embodiments of the invention relate to a camera assembly including a rear-facing camera and a front-facing camera operatively coupled together (e.g., bonded, stacked on a common substrate).In some embodiments of the invention, a system having an array of frontside illuminated (FSI) imaging pixels is bonded to a system having an array of backside illuminated (BSI) imaging pixels, creating a camera assembly with a minimal size (e.g., a reduced thickness compared to prior art solutions). An FSI image sensor wafer may be used as a handle wafer for a BSI image sensor wafer when it is thinned, thereby decreasing the thickness of the overall camera module. According to other embodiments of the invention, two package dies, one a BSI image sensor, the other an FSI image sensor, are stacked on a common substrate such as a printed circuit board, and are operatively coupled together via redistribution layers.

Abstract translation: 本发明的实施例涉及一种照相机组件，其包括背面照相机和可操作地耦合在一起的例如相机（例如，粘合的，堆叠在公共衬底上）的前置照相机。在本发明的一些实施例中，具有前侧照明（FSI）成像像素阵列的系统被结合到具有背面照明（BSI）成像像素阵列的系统，从而产生具有最小尺寸的照相机组件（例如，减小的厚度与现有技术的解决方案相比）。可以使用FSI图像传感器晶片作为BSI图像传感器晶片的处理晶片，当其变薄时，从而减小整个相机模块的厚度。根据本发明的其它实施例，两个封装管芯，一个BSI图像传感器，另一个是FSI图像传感器，堆叠在诸如印刷电路板的公共基板上，并且通过再分配层可操作地耦合在一起。

35.

发明授权
Color filter including clear pixel and hard mask 有权
Title translation: 滤色片包括透明像素和硬掩模

公开(公告)号：US08941159B2

公开(公告)日：2015-01-27

申请号：US13754465

申请日：2013-01-30

Applicant: OmniVision Technologies, Inc.

Inventor： Gang Chen , Duli Mao , Hsin-Chih Tai , Howard E. Rhodes

IPC: H01L21/02 , H01L27/146 , G02B5/20 , G02B1/10

CPC classification number: G02B5/201 , G02B1/105 , G02B1/14 , H01L27/14621 , H01L27/14627 , H01L27/1464 , H01L27/14685

Abstract: Embodiments of an apparatus including a color filter arrangement formed on a substrate having a pixel array formed therein. The color filter arrangement includes a clear filter having a first clear hard mask layer and a second clear hard mask layer formed thereon, a first color filter having the first clear hard mask layer and the second hard mask layer formed thereon, a second color filter having the first clear hard mask layer formed thereon, and a third color filter having no clear hard mask layer formed thereon. Other embodiments are disclosed and claimed.

Abstract translation: 包括形成在其上形成有像素阵列的基板上的滤色器装置的装置的实施例。滤色器装置包括具有形成在其上的第一透明硬掩模层和第二透明硬掩模层的透明滤光器，具有形成在其上的第一透明硬掩模层和第二硬掩模层的第一滤色器，具有第二透明硬掩模层的第二滤色器，形成在其上的第一透明硬掩模层和形成有透明硬掩模层的第三滤色器。公开和要求保护其他实施例。

36.

发明授权
Process to eliminate lag in pixels having a plasma-doped pinning layer 有权
Title translation: 消除具有等离子体掺杂钉扎层的像素滞后的过程

公开(公告)号：US08921187B2

公开(公告)日：2014-12-30

申请号：US13777197

申请日：2013-02-26

Applicant: OmniVision Technologies, Inc.

Inventor： Gang Chen , Duli Mao , Hsin-Chih Tai , Vincent Venezia , Yin Qian , Howard E. Rhodes

IPC: H01L27/148 , H01L27/146

CPC classification number: H01L27/14689 , H01L27/1461 , H01L27/1463 , H01L27/14643

Abstract: Embodiments of a process including depositing a sacrificial layer on the surface of a substrate over a photosensitive region, over the top surface of a transfer gate, and over at least the sidewall of the transfer gate closest to the photosensitive region, the sacrificial layer having a selected thickness. A layer of photoresist is deposited over the sacrificial layer, which is patterned and etched to expose the surface of the substrate over the photosensitive region and at least part of the transfer gate top surface, leaving a sacrificial spacer on the sidewall of the transfer gate closest to the photosensitive region. The substrate is plasma doped to form a pinning layer between the photosensitive region and the surface of the substrate. The spacing between the pinning layer and the sidewall of the transfer gate substantially corresponds to a thickness of the sacrificial spacer. Other embodiments are disclosed and claimed.

Abstract translation: 一种方法的实施方案包括在光敏区域上方的基底表面上沉积牺牲层，在转移栅极的顶表面上，以及至少最靠近光敏区域的转移栅极的侧壁，牺牲层具有选择厚度。在牺牲层上沉积一层光致抗蚀剂，其被图案化和蚀刻以在基片的表面上在感光区域和至少部分传输栅极顶表面上露出基底表面，在传输门的侧壁上留下牺牲隔离物到感光区域。衬底是等离子体掺杂的，以在光敏区域和衬底的表面之间形成钉扎层。钉扎层和转移门的侧壁之间的间隔基本上对应于牺牲间隔物的厚度。公开和要求保护其他实施例。

37.

发明授权
Dual-facing camera assembly 有权
Title translation: 双面相机组合

公开(公告)号：US08900912B2

公开(公告)日：2014-12-02

申请号：US13927495

申请日：2013-06-26

Applicant: Omnivision Technologies, Inc.

Inventor： Gang Chen , Ashish Shah , Duli Mao , Hsin-Chih Tai , Howard E. Rhodes

IPC: H01L21/00 , H01L27/146

CPC classification number: H01L27/14645 , H01L27/14605 , H01L27/1462 , H01L27/14621 , H01L27/14627 , H01L27/14634 , H01L27/14636 , H01L27/1464 , H01L27/1469

Abstract: Embodiments of the invention relate to a camera assembly including a rear-facing camera and a front-facing camera operatively coupled together (e.g., bonded, stacked on a common substrate).In some embodiments of the invention, a system having an array of frontside illuminated (FSI) imaging pixels is bonded to a system having an array of backside illuminated (BSI) imaging pixels, creating a camera assembly with a minimal size (e.g., a reduced thickness compared to prior art solutions). An FSI image sensor wafer may be used as a handle wafer for a BSI image sensor wafer when it is thinned, thereby decreasing the thickness of the overall camera module. According to other embodiments of the invention, two package dies, one a BSI image sensor, the other an FSI image sensor, are stacked on a common substrate such as a printed circuit board, and are operatively coupled together via redistribution layers.

Abstract translation: 本发明的实施例涉及一种照相机组件，其包括背面照相机和可操作地耦合在一起的例如相机（例如，粘合的，堆叠在公共衬底上）的前置照相机。在本发明的一些实施例中，具有前侧照明（FSI）成像像素阵列的系统被结合到具有背面照明（BSI）成像像素阵列的系统，从而产生具有最小尺寸的照相机组件（例如，减小的厚度与现有技术的解决方案相比）。可以使用FSI图像传感器晶片作为BSI图像传感器晶片的处理晶片，当其变薄时，从而减小整个相机模块的厚度。根据本发明的其它实施例，两个封装管芯，一个BSI图像传感器，另一个是FSI图像传感器，堆叠在诸如印刷电路板的公共基板上，并且通过再分配层可操作地耦合在一起。

38.

发明申请
NEGATIVELY CHARGED LAYER TO REDUCE IMAGE MEMORY EFFECT 审中-公开
Title translation: 有意义的电荷层减少图像记忆效应

公开(公告)号：US20140327102A1

公开(公告)日：2014-11-06

申请号：US14331652

申请日：2014-07-15

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Howard E. Rhodes , Dajiang Yang , Gang Chen , Duli Mao , Vincent Venezia

IPC: H01L31/0224 , H01L31/103

CPC classification number: H01L31/0224 , H01L27/14609 , H01L27/1462 , H01L27/14643 , H01L31/103

Abstract: An image sensor pixel includes a photodiode region having a first polarity doping type disposed in a semiconductor layer. A pinning surface layer having a second polarity doping type is disposed over the photodiode region in the semiconductor layer. A first polarity charge layer is disposed proximate to the pinning surface layer over the photodiode region. A contact etch stop layer is disposed over the photodiode region proximate to the first polarity charge layer. The first polarity charge layer is disposed between the pinning surface layer and the contact etch stop layer such that first polarity charge layer cancels out charge having a second polarity that is induced in the contact etch stop layer. The first polarity charge layer is disposed between a first one of a plurality of passivation layers and a second one of the plurality of passivation layers disposed over the photodiode region.

Abstract translation: 图像传感器像素包括设置在半导体层中的具有第一极性掺杂型的光电二极管区域。具有第二极性掺杂型的钉扎表面层设置在半导体层中的光电二极管区域的上方。第一极性电荷层设置在光电二极管区域附近的钉扎表面层附近。接触蚀刻停止层设置在靠近第一极性电荷层的光电二极管区域的上方。第一极性电荷层设置在钉扎表面层和接触蚀刻停止层之间，使得第一极性电荷层抵消在接触蚀刻停止层中感应的具有第二极性的电荷。第一极性电荷层设置在多个钝化层中的第一个和设置在光电二极管区域上的多个钝化层中的第二钝化层之间。

39.

发明申请
PAD DESIGN FOR CIRCUIT UNDER PAD IN SEMICONDUCTOR DEVICES 有权
Title translation: 用于在半导体器件中的电路下的电路的PAD设计

公开(公告)号：US20140035089A1

公开(公告)日：2014-02-06

申请号：US14052944

申请日：2013-10-14

Applicant: OmniVision Technologies, Inc.

Inventor： Yin Qian , Dyson H. Tai , Keh-Chiang Ku , Vincent Venezia , Duli Mao , Wei Zheng , Howard E. Rhodes

IPC: H01L23/48

CPC classification number: H01L23/481 , H01L21/6835 , H01L23/522 , H01L24/05 , H01L27/14636 , H01L27/1464 , H01L2221/6835 , H01L2224/05548 , H01L2224/05553 , H01L2224/05567 , H01L2924/00014 , H01L2924/12043 , H01L2224/05552 , H01L2924/00

Abstract: Embodiments of a semiconductor device that includes a semiconductor substrate and a cavity disposed in the semiconductor substrate that extends at least from a first side of the semiconductor substrate to a second side of the semiconductor substrate. The semiconductor device also includes an insulation layer disposed over the first side of the semiconductor substrate and coating sidewalls of the cavity. A conductive layer including a bonding pad is disposed over the insulation layer. The conductive layer extends into the cavity and connects to a metal stack disposed below the second side of the semiconductor substrate. A through silicon via pad is disposed below the second side of the semiconductor substrate and connected to the metal stack. The through silicon via pad is position to accept a through silicon via.

Abstract translation: 半导体器件的实施例包括半导体衬底和设置在半导体衬底中的至少从半导体衬底的第一侧至半导体衬底的第二侧延伸的空腔。半导体器件还包括设置在半导体衬底的第一侧上并涂覆空腔的侧壁的绝缘层。包括接合焊盘的导电层设置在绝缘层上。导电层延伸到空腔中并且连接到设置在半导体衬底的第二侧下方的金属叠层。贯穿硅通孔焊盘设置在半导体衬底的第二侧下方并连接到金属堆叠。贯穿硅通孔焊盘的位置是接受硅通孔。