HIGH DYNAMIC RANGE IMAGE SENSOR WITH REDUCED SENSITIVITY TO HIGH INTENSITY LIGHT

    公开(公告)号:US20170213863A1

    公开(公告)日:2017-07-27

    申请号:US15239537

    申请日:2016-08-17

    Abstract: An image sensor includes first and second pluralities of photodiodes interspersed among each other in a semiconductor substrate. Incident light is to be directed through a surface of the semiconductor substrate into the first and second pluralities of photodiodes. The first plurality of photodiodes has greater sensitivity to the incident light than the second plurality of photodiodes. A metal film layer is disposed over the surface of the semiconductor substrate over the second plurality of photodiodes and not over the first plurality of photodiodes. A metal grid is disposed over the surface of the semiconductor substrate, and includes a first plurality of openings through which the incident light is directed into the first plurality of photodiodes. The metal grid further includes a second plurality of openings through which the incident light is directed through the metal film layer into the second plurality of photodiodes.

    PHOTOSENSITIVE CAPACITOR PIXEL FOR IMAGE SENSOR
    33.
    发明申请
    PHOTOSENSITIVE CAPACITOR PIXEL FOR IMAGE SENSOR 有权
    用于图像传感器的感光电容像素

    公开(公告)号:US20160276380A1

    公开(公告)日:2016-09-22

    申请号:US14662655

    申请日:2015-03-19

    Abstract: An image sensor pixel, and image sensor, and a method of fabricating the same is disclosed. The image pixel includes a photosensitive capacitor and a transistor network. The photosensitive capacitor includes an electrode, a conductive layer, a dielectric layer, and a photosensitive semiconductor material. The conductive layer is disposed around the electrode and the dielectric layer is formed between the conductive layer and the electrode. The photosensitive semiconductor material is for generating an image signal in response to image light and is disposed between the dielectric layer and the electrode. The transistor network is coupled to readout the image signal from the electrode of the photosensitive capacitor.

    Abstract translation: 公开了一种图像传感器像素和图像传感器及其制造方法。 图像像素包括光敏电容器和晶体管网络。 感光电容器包括电极,导电层,电介质层和光敏半导体材料。 导电层设置在电极周围,并且介电层形成在导电层和电极之间。 感光半导体材料用于响应于图像光产生图像信号,并且设置在电介质层和电极之间。 晶体管网络被耦合以从光敏电容器的电极读出图像信号。

    METHOD OF FABRICATING MULTI-WAFER IMAGE SENSOR
    34.
    发明申请
    METHOD OF FABRICATING MULTI-WAFER IMAGE SENSOR 审中-公开
    制造多波幅图像传感器的方法

    公开(公告)号:US20160268333A1

    公开(公告)日:2016-09-15

    申请号:US15166002

    申请日:2016-05-26

    Abstract: A method of fabricating an image system includes forming a first wafer that includes a first semiconductor substrate and a first interconnect layer. A pixel array is formed in an imaging region of the first semiconductor substrate and a first insulation-filled trench is formed in a peripheral circuit region of the first semiconductor substrate. Additionally, a second wafer is formed that includes a second semiconductor substrate and a second interconnect layer. A second insulation-filled trench is formed in a second semiconductor substrate, and the first wafer is bonded to the second wafer. A third interconnect layer of a third wafer is bonded to the second wafer. At least one deep via cavity is formed through the first and second interconnect layers and through the first and second insulation-filled trenches. The at least one deep via cavity is filled with a conductive material to form a deep via.

    Abstract translation: 制造图像系统的方法包括形成包括第一半导体衬底和第一互连层的第一晶片。 像素阵列形成在第一半导体衬底的成像区域中,并且第一绝缘填充沟槽形成在第一半导体衬底的外围电路区域中。 此外,形成包括第二半导体衬底和第二互连层的第二晶片。 在第二半导体衬底中形成第二绝缘填充沟槽,并且将第一晶片接合到第二晶片。 第三晶片的第三互连层被结合到第二晶片。 通过第一和第二互连层并穿过第一和第二绝缘填充沟槽形成至少一个深通孔腔。 至少一个深通孔腔被导电材料填充以形成深通孔。

    METHOD OF FABRICATING MULTI-WAFER IMAGE SENSOR
    35.
    发明申请
    METHOD OF FABRICATING MULTI-WAFER IMAGE SENSOR 有权
    制造多波幅图像传感器的方法

    公开(公告)号:US20160111468A1

    公开(公告)日:2016-04-21

    申请号:US14515307

    申请日:2014-10-15

    Abstract: A method of fabricating an image sensor includes forming a pixel array in an imaging region of a semiconductor substrate and forming a trench in a peripheral region of the semiconductor substrate after forming the pixel array. The peripheral region is on a perimeter of the imaging region. The trench is filled with an insulating material. An interconnect layer is formed after filling the trench with insulating material. A first wafer is bonded to a second wafer. The first wafer includes the interconnect layer and the semiconductor substrate. A backside of the semiconductor substrate is thinned to expose the insulating material. A via cavity is formed through the insulating material. The via cavity extends down to a second interconnect layer of the second wafer. The via cavity is filled with a conductive material to form a via. The insulating material insulates the conductive material from the semiconductor substrate.

    Abstract translation: 制造图像传感器的方法包括在形成像素阵列之后,在半导体衬底的成像区域中形成像素阵列并在半导体衬底的周边区域中形成沟槽。 周边区域位于成像区域的周边。 沟槽填充绝缘材料。 在用绝缘材料填充沟槽之后形成互连层。 第一晶片结合到第二晶片。 第一晶片包括互连层和半导体衬底。 半导体衬底的背面变薄以露出绝缘材料。 通过绝缘材料形成通孔。 通孔腔向下延伸到第二晶片的第二互连层。 通孔腔填充导电材料以形成通孔。 绝缘材料使导电材料与半导体衬底绝缘。

    NEGATIVE BIASED SUBSTRATE FOR PIXELS IN STACKED IMAGE SENSORS
    36.
    发明申请
    NEGATIVE BIASED SUBSTRATE FOR PIXELS IN STACKED IMAGE SENSORS 有权
    堆叠式图像传感器中的像素的负偏移基板

    公开(公告)号:US20160037111A1

    公开(公告)日:2016-02-04

    申请号:US14448154

    申请日:2014-07-31

    Abstract: A pixel cell includes a photodiode disposed within a first semiconductor chip for accumulating an image charge in response to light incident upon the photodiode. A transfer transistor is disposed within the first semiconductor chip and coupled to the photodiode to transfer the image charge from the photodiode. A bias voltage generation circuit disposed within a second semiconductor chip for generating a bias voltage. The bias voltage generation circuit is coupled to the first semiconductor chip to bias the photodiode with the bias voltage. The bias voltage is negative with respect to a ground voltage of the second semiconductor chip. A floating diffusion is disposed within the second semiconductor chip. The transfer transistor is coupled to transfer the image charge from the photodiode on the first semiconductor chip to the floating diffusion on the second semiconductor chip.

    Abstract translation: 像素单元包括设置在第一半导体芯片内的光电二极管,用于响应入射在光电二极管上的光累积图像电荷。 传输晶体管设置在第一半导体芯片内并耦合到光电二极管以从光电二极管传输图像电荷。 偏置电压产生电路,设置在第二半导体芯片内,用于产生偏置电压。 偏置电压产生电路耦合到第一半导体芯片以偏置偏压的光电二极管。 偏置电压相对于第二半导体芯片的接地电压为负。 浮置扩散部设置在第二半导体芯片内。 传输晶体管被耦合以将图像电荷从第一半导体芯片上的光电二极管转移到第二半导体芯片上的浮动扩散。

    Optical shield in a pixel cell planarization layer for black level correction
    37.
    发明授权
    Optical shield in a pixel cell planarization layer for black level correction 有权
    用于黑色电平校正的像素单元平面化层中的光学屏蔽

    公开(公告)号:US08981512B1

    公开(公告)日:2015-03-17

    申请号:US14030395

    申请日:2013-09-18

    CPC classification number: H01L27/14623 H01L27/14621 H01L27/14627

    Abstract: A pixel array includes a plurality of photodiodes disposed in a semiconductor layer and arranged in the pixel array. A color filter layer is disposed proximate to the semiconductor layer. Light is to be directed to at least a first one of the plurality of photodiodes through the color filter layer. An optical shield layer is disposed proximate to the color filter layer. The color filter layer is disposed between the optical shield layer and the semiconductor layer. The optical shield layer shields at least a second one of the plurality of photodiodes from the light.

    Abstract translation: 像素阵列包括设置在半导体层中并布置在像素阵列中的多个光电二极管。 滤色器层靠近半导体层设置。 光通过滤色器层被引导到多个光电二极管中的至少第一个。 光屏蔽层靠近滤色器层设置。 滤色器层设置在光学屏蔽层和半导体层之间。 光屏蔽层屏蔽来自光的多个光电二极管中的至少一个。

    LATERAL LIGHT SHIELD IN BACKSIDE ILLUMINATED IMAGING SENSORS
    38.
    发明申请
    LATERAL LIGHT SHIELD IN BACKSIDE ILLUMINATED IMAGING SENSORS 审中-公开
    背光照明成像传感器中的侧光

    公开(公告)号:US20140312447A1

    公开(公告)日:2014-10-23

    申请号:US14319807

    申请日:2014-06-30

    CPC classification number: H01L27/1462 H01L27/14623 H01L27/1464 H01L27/14685

    Abstract: A backside illuminated image sensor includes a semiconductor layer and a trench disposed in the semiconductor layer. The semiconductor layer has a frontside surface and a backside surface. The semiconductor layer includes a light sensing element of a pixel array disposed in a sensor array region of the semiconductor layer. The pixel array is positioned to receive external incoming light through the backside surface of the semiconductor layer. The semiconductor layer also includes a light emitting element disposed in a periphery circuit region of the semiconductor layer external to the sensor array region. The trench is disposed in the semiconductor layer between the light sensing element and the light emitting element.

    Abstract translation: 背面照明图像传感器包括设置在半导体层中的半导体层和沟槽。 半导体层具有前表面和背面。 半导体层包括设置在半导体层的传感器阵列区域中的像素阵列的光感测元件。 像素阵列被定位成接收穿过半导体层的背面的外部入射光。 半导体层还包括设置在传感器阵列区域外部的半导体层的外围电路区域中的发光元件。 沟槽设置在光感测元件和发光元件之间的半导体层中。

    Pad design for circuit under pad in semiconductor devices
    39.
    发明授权
    Pad design for circuit under pad in semiconductor devices 有权
    垫片设计用于半导体器件衬底下的电路

    公开(公告)号:US08729712B2

    公开(公告)日:2014-05-20

    申请号:US14052944

    申请日:2013-10-14

    Abstract: Embodiments of a semiconductor device that includes a semiconductor substrate and a cavity disposed in the semiconductor substrate that extends at least from a first side of the semiconductor substrate to a second side of the semiconductor substrate. The semiconductor device also includes an insulation layer disposed over the first side of the semiconductor substrate and coating sidewalls of the cavity. A conductive layer including a bonding pad is disposed over the insulation layer. The conductive layer extends into the cavity and connects to a metal stack disposed below the second side of the semiconductor substrate. A through silicon via pad is disposed below the second side of the semiconductor substrate and connected to the metal stack. The through silicon via pad is position to accept a through silicon via.

    Abstract translation: 半导体器件的实施例包括半导体衬底和设置在半导体衬底中的至少从半导体衬底的第一侧至半导体衬底的第二侧延伸的空腔。 半导体器件还包括设置在半导体衬底的第一侧上并涂覆空腔的侧壁的绝缘层。 包括接合焊盘的导电层设置在绝缘层上。 导电层延伸到空腔中并且连接到设置在半导体衬底的第二侧下方的金属叠层。 贯穿硅通孔焊盘设置在半导体衬底的第二侧下方并连接到金属堆叠。 贯穿硅通孔焊盘的位置是接受硅通孔。

    Interconnect layer contact and method for improved packaged integrated circuit reliability

    公开(公告)号:US10892290B2

    公开(公告)日:2021-01-12

    申请号:US15937742

    申请日:2018-03-27

    Abstract: Packaged photosensor ICs are made by fabricating an integrated circuit (IC) with multiple bondpads; forming vias from IC backside through semiconductor to expose a first layer metal; depositing conductive metal plugs in the vias; depositing interconnect metal; depositing solder-mask dielectric over the interconnect metal and openings therethrough; forming solder bumps on interconnect metal at the openings in the solder-mask dielectric; and bonding the solder bumps to conductors of a package. The photosensor IC has a substrate; multiple metal layers separated by dielectric layers formed on a first surface of the substrate into which transistors are formed; multiple bondpad structures formed of at least a first metal layer of the metal layers; vias with metal plugs formed through a dielectric over a second surface of the semiconductor substrate, interconnect metal on the dielectric forming connection shapes, and shapes of the interconnect layer coupled to each conductive plug and to solder bumps.

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