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公开(公告)号：US11600681B2
公开(公告)日：2023-03-07
申请号：US16960729
申请日：2019-08-23
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Dachao Li , Shengji Yang , Chen Xu
IPC: H01L27/32
Abstract: A display device and a manufacturing method thereof are disclosed. The display device includes a base substrate and at least one pixel circuit provided on the base substrate. The pixel circuit includes a driving transistor, a first transistor, and a second transistor; the base substrate includes a semiconductor body that can be doped, and a first conductive layer and a second conductive layer that are on the semiconductor body; the first transistor includes a first doped region in contact with the first electrode of the first transistor, and a second doped region in contact with a second electrode of the first transistor, and the first doped region of the first transistor and the second doped region of the first transistor are spaced apart from each other, have a same doping type, and are both in the semiconductor body.
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公开(公告)号：US11600234B2
公开(公告)日：2023-03-07
申请号：US16814119
申请日：2020-03-10
Inventor： Weilin Lai , Yucheng Chan , Jianbang Huang , Dachao Li , Shengji Yang , Pengcheng Lu , Kuanta Huang , Xiaochuan Chen , Xue Dong , Hui Wang , Yanming Wang , Chen Xu , Dacheng Zhang , Yongfa Dong , Qing Wang , Hui Tong , Yunlong Li
IPC: H01L27/32 , G09G3/3291 , G09G3/3258 , G09G3/3266
Abstract: A display substrate and a driving method thereof are provided. The display substrate includes a base substrate containing a monocrystalline silicon layer, a thickness of the monocrystalline silicon layer being less than that of the base substrate; an array circuit layer, disposed on the base substrate and including a plurality of transistors, each of which has an active layer inside the monocrystalline silicon layer; and a plurality of light-emitting elements, located at a side of the array circuit layer away from the base substrate. The array circuit layer includes a scan driving circuit, a data driving circuit and a plurality of pixel sub-circuits, and the plurality of pixel sub-circuits are connected to the plurality of light-emitting elements, respectively, to form a plurality of sub-pixels.
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33.发明授权公开(公告)号：US11488513B2
公开(公告)日：2022-11-01
申请号：US16475513
申请日：2019-01-08
Inventor： Jianbo Xian , Chen Xu , Xueguang Hao , Yong Qiao
IPC: G09G3/3266 , G09G3/20
Abstract: A shift register unit, a circuit structure, a gate drive circuit, a drive circuit and a display device are provided. A shift register unit includes a substrate and an input circuit, a reset circuit, a first output circuit, a first output terminal, a first connection conductive portion connecting both the input circuit and the reset circuit, a second connection conductive portion connecting both the reset circuit and the first output circuit, and a third connection conductive portion connecting both the first output circuit and the first output terminal, all of which are on the substrate.
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34.发明授权公开(公告)号：US11475826B2
公开(公告)日：2022-10-18
申请号：US16622449
申请日：2019-03-18
Inventor： Xinguo Li , Chen Xu , Xinyin Wu , Yong Qiao , Xueguang Hao
IPC: G09G3/20 , G09G3/00 , G09G3/3225 , G11C19/28
Abstract: The present disclosure relates to a shift register for a display panel. The shift register may include an input terminal, an output terminal, an input unit, an output unit, a first control unit, a second control unit, and a first isolation unit. The output unit may be configured to transmit a first level or a second level to an output terminal based on levels of a first node and a second node.
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35.发明授权公开(公告)号：US11374131B2
公开(公告)日：2022-06-28
申请号：US16635140
申请日：2019-08-01
Inventor： Hongfei Cheng , Chen Xu
IPC: H01L29/786 , H01L27/12 , H01L29/45 , H01L29/66
Abstract: A thin film transistor, an array substrate, a display device and a method for manufacturing a thin film transistor are provided. The thin film transistor is formed on a base substrate and includes a source; a drain; and a semiconductor active layer having an amorphous silicon layer and one polysilicon portion or a plurality of polysilicon portions, the amorphous silicon layer being contacted with the one polysilicon portion or the plurality of polysilicon portions. The method includes a process of forming a source, a drain, and a semiconductor active layer: wherein forming a semiconductor active layer comprises: forming a first amorphous silicon thin film on a base substrate; and performing a crystallization treatment to the first amorphous silicon thin film to convert a part of the amorphous silicon in the first amorphous silicon thin film into polysilicon, such that a semiconductor active layer comprising one polysilicon portion or a plurality of polysilicon portions are formed.
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Patent Agency Ranking
公开(公告)号：US20220036822A1
公开(公告)日：2022-02-03
申请号：US17278692
申请日：2020-07-30
Inventor： Pan Li , Xueguang Hao , Chen Xu
IPC: G09G3/3233
Abstract: A pixel driving circuit, an array substrate and a display device are provided. The pixel driving circuit includes a first interlayer dielectric layer and a second interlayer dielectric layer. The first interlayer dielectric layer is arranged on the side of a gate layer lead away from a base substrate and is formed with a first via hole exposing the gate layer lead. The second interlayer dielectric layer is arranged on the side of the first interlayer dielectric layer away from the base substrate and is formed with a second via hole exposing the first via hole. A source drain layer lead is arranged on the side of the second interlayer dielectric layer away from the base substrate and is electrically connected to the gate layer lead through the first via hole and the second via hole.
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公开(公告)号：US11062645B1
公开(公告)日：2021-07-13
申请号：US16909204
申请日：2020-06-23
Inventor： Chen Xu , Xueguang Hao , Yong Qiao , Xinyin Wu
IPC: G09G3/32
Abstract: Disclosed is a display device, including a plurality of pixel circuits located in a display area, and a light-emitting driving circuit located in a non-display area and electrically connected to the plurality of pixel circuits; the light-emitting driving circuit includes a plurality of cascaded shift registers; except a last stage of shift register, a signal output terminal of each stage of remaining shift registers is electrically connected to an input signal terminal of a next stage of shift register adjacent thereto; each of the plurality of cascaded shift registers includes: an input circuit, a first node potential control circuit, a second node potential control circuit, a first isolation circuit, a second isolation circuit, a first output control circuit, a second output control circuit, a capacitor circuit, a first output circuit and a second output circuit.
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公开(公告)号：US20200185535A1
公开(公告)日：2020-06-11
申请号：US16528622
申请日：2019-08-01
Applicant: BOE Technology Group Co., Ltd.
Inventor： Feng Guan , Guangcai Yuan , Zhi Wang , Chen Xu , Qi Yao , Zhanfeng Cao , Ce Ning , Woobong Lee , Lei Chen
IPC: H01L29/786 , H01L27/12
Abstract: An oxide thin film transistor, an array substrate, and preparation methods thereof are disclosed. The method for preparing an oxide thin film transistor comprises a step of forming a pattern comprising an oxide semiconductor active layer on a substrate, wherein the step comprises: forming an amorphous oxide semiconductor thin film on the substrate; performing an excimer laser annealing, at least at a position in the amorphous oxide semiconductor thin film corresponding to a channel region of oxide semiconductor active layer to be formed, such that the amorphous oxide semiconductor material at the laser-annealed position is crystallized, to form a crystalline oxide semiconductor material; and forming the pattern comprising the oxide semiconductor active layer.
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公开(公告)号：US12236897B2
公开(公告)日：2025-02-25
申请号：US18620521
申请日：2024-03-28
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Xing Yao , Chen Xu , Jingquan Wang , Xinyin Wu
IPC: G09G3/3266 , H10K59/126 , H10K59/131
Abstract: A display substrate is provided. The display substrate includes a base substrate including a display region and a peripheral region, a gate scan driving circuit, a light-emitting control scan driving circuit, a first power line, a first planarization layer, a second planarization layer and a first shielding layer and a second shielding layer. The first planarization layer and the second planarization layer further include an open slot. The second shielding layer extends from a region corresponding to the light-emitting control scan driving circuit to a region corresponding to the gate scan driving circuit and covers the open slot. In an area where the second shielding layer is close to the open slot, an orthographic projection of the second shielding layer covering the open slot on the base substrate at least overlaps with an orthographic projection of the first shielding layer on the base substrate.
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公开(公告)号：US12178102B2
公开(公告)日：2024-12-24
申请号：US17437142
申请日：2021-05-18
IPC: H10K59/179 , H10K102/00
Abstract: A display panel and a display device are provided. The display panel includes a base substrate and a conductive member, wherein the conductive member is located on the base substrate and includes a first conductive sub-layer, a second conductive sub-layer and a third conductive sub-layer stacked in sequence; the first conductive sub-layer is closer to the base substrate than the third conductive sub-layer; a conductivity of the first conductive sub-layer is smaller than that of the second conductive sub-layer, and a melting point of the third conductive sub-layer is larger than that of the second conductive sub-layer; the second conductive sub-layer includes a first surface close to the first conductive sub-layer and a second surface close to the third conductive sub-layer, the first surface and the second surface are oppositely arranged; the third conductive sub-layer protrudes from the second surface along a width direction of the conductive member.
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