MOSFET switch with embedded electrostatic charge
    32.
    发明授权
    MOSFET switch with embedded electrostatic charge 有权
    具有嵌入式静电荷的MOSFET开关

    公开(公告)号:US08310001B2

    公开(公告)日:2012-11-13

    申请号:US12394107

    申请日:2009-02-27

    IPC分类号: H01L29/94

    摘要: A vertical device structure includes a volume of semiconductor material, laterally adjoining a trench having insulating material on sidewalls thereof. A gate electrode within the trench is capacitively coupled through the insulating material to a first portion of the semiconducting material. Some portions of the insulating material contain fixed electrostatic charge in a density high enough to invert a second portion of the semiconductor material when no voltage is applied. The inverted portions can be used as induced source or drain extensions, to assure that parasitic are reduced without increasing on-resistance.

    摘要翻译: 垂直装置结构包括一半体积的半导体材料,横向邻接在其侧壁上具有绝缘材料的沟槽。 沟槽内的栅电极通过绝缘材料电容耦合到半导体材料的第一部分。 绝缘材料的一些部分含有固定的静电电荷,其密度足够高以在没有施加电压时反转半导体材料的第二部分。 反向部分可用作感应源极或漏极延伸部分,以确保寄生电流在不增加导通电阻的情况下降低。

    Power device structures and methods
    33.
    发明授权
    Power device structures and methods 有权
    功率器件结构和方法

    公开(公告)号:US08304329B2

    公开(公告)日:2012-11-06

    申请号:US12626523

    申请日:2009-11-25

    IPC分类号: H01L29/78

    摘要: Vertical power devices which include an insulated trench containing insulating material and a gate electrode, and related methods. A body region is positioned so that a voltage bias on the gate electrode will cause an inversion layer in the body region. A layer of permanent charge, at or near the sidewall of the trench, provides charge balancing for the space charge in the depleted semiconductor material during the OFF state. A conductive shield layer is positioned below the gate electrode in the insulating material, and reduces capacitive coupling between the gate and the lower part of the trench. This reduces switching losses. In other embodiments, a planar gate electrode controls horizontal carrier injection into the vertical conduction pathway along the trench, while a shield plate lies over the trench itself to reduce capacitive coupling.

    摘要翻译: 垂直功率器件,包括绝缘沟槽,包含绝缘材料和栅电极,以及相关方法。 定位体区域,使得栅电极上的电压偏置将在体区域中引起反转层。 在沟槽的侧壁处或其附近的永久电荷层在关闭状态期间为耗尽的半导体材料中的空间电荷提供电荷平衡。 导电屏蔽层位于绝缘材料中的栅电极下方,并且减小栅极与沟槽下部之间的电容耦合。 这减少了开关损耗。 在其他实施例中,平面栅极电极控制沿着沟槽的垂直传导路径的水平载流子注入,而屏蔽板位于沟槽本身上以减小电容耦合。

    Semiconductor device structures and related processes
    34.
    发明授权
    Semiconductor device structures and related processes 有权
    半导体器件结构及相关工艺

    公开(公告)号:US08076719B2

    公开(公告)日:2011-12-13

    申请号:US12368399

    申请日:2009-02-10

    IPC分类号: H01L29/78

    摘要: Improved highly reliable power RFP structures and fabrication and operation processes. The structure includes plurality of localized dopant concentrated zones beneath the trenches of RFPs, either floating or extending and merging with the body layer of the MOSFET or connecting with the source layer through a region of vertical doped region. This local dopant zone decreases the minority carrier injection efficiency of the body diode of the device and alters the electric field distribution during the body diode reverse recovery.

    摘要翻译: 改进了高可靠性的功率RFP结构和制造和操作过程。 该结构包括在RFP沟槽下面的多个局部掺杂浓缩区域,浮动或延伸并与MOSFET的体层合并或者通过垂直掺杂区域的区域与源层连接。 该局部掺杂剂区域降低器件体二极管的少数载流子注入效率,并改变体二极管反向恢复期间的电场分布。

    Super Self-Aligned Trench MOSFET Devices, Methods, and Systems
    38.
    发明申请
    Super Self-Aligned Trench MOSFET Devices, Methods, and Systems 有权
    超自适应沟槽MOSFET器件,方法和系统

    公开(公告)号:US20090309156A1

    公开(公告)日:2009-12-17

    申请号:US12392131

    申请日:2009-02-25

    IPC分类号: H01L29/78 H01L21/336

    摘要: A manufacturing process and design structure for a super self-aligned trench power MOSFET. A plurality of super self-aligned trenches of different depths are formed into the body layer and epitaxial layers, preferably by using a multilayer stack of dielectric material etched to form spacers. Respective trenches contain gate conductors, body-contact conductors, and preferably a third trench containing a recessed field plate. This results in a MOSFET structure having high cell density and low gate charges and gate-drain charges.

    摘要翻译: 超自对准沟槽功率MOSFET的制造工艺和设计结构。 优选地,通过蚀刻以形成间隔物的电介质材料的多层堆叠,将不同深度的多个超自对准沟槽形成为主体层和外延层。 相应的沟槽包含门导体,体接触导体,并且优选地包含含有凹陷场板的第三沟槽。 这导致具有高电池密度和低栅极电荷和栅极 - 漏极电荷的MOSFET结构。