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    Capacitive element and semiconductor memory device
    31.
    发明申请
    Capacitive element and semiconductor memory device 失效
    电容元件和半导体存储器件

    公开(公告)号：US20050006684A1

    公开(公告)日：2005-01-13

    申请号：US10916482

    申请日：2004-08-12

    Applicant: Yoshihisa Nagano ,  Shinichiro Hayashi

    Inventor： Yoshihisa Nagano ,  Shinichiro Hayashi

    IPC: H01L21/02 ,  H01L21/8242 ,  H01L29/76

    CPC classification number: H01L28/55 ,  H01L27/10852 ,  H01L28/65 ,  H01L28/90

    Abstract: A capacitive element includes a lower electrode having a three-dimensional shape, an upper electrode formed so as to be opposed to the lower electrode, and a capacitor insulating film formed between the lower and upper electrodes and made of a crystallized ferroelectric material. The thickness of the capacitor insulating film is set at 12.5 through 100 nm both inclusive.

    Abstract translation: 电容元件包括具有三维形状的下电极，形成为与下电极相对的上电极，以及形成在下电极和上电极之间并由结晶铁电材料制成的电容器绝缘膜。 电容绝缘膜的厚度设定为12.5〜100nm。

    Semiconductor memory
    33.
    发明授权
    Semiconductor memory 有权
    半导体存储器

    公开(公告)号：US06448598B2

    公开(公告)日：2002-09-10

    申请号：US09338542

    申请日：1999-06-23

    Applicant: Yoshihisa Nagano ,  Shinichiro Hayashi ,  Yasuhiro Uemoto

    Inventor： Yoshihisa Nagano ,  Shinichiro Hayashi ,  Yasuhiro Uemoto

    IPC: H01L27108

    CPC classification number: H01L27/10852 ,  H01L28/55

    Abstract: A semiconductor memory includes plural lower electrodes formed on a semiconductor substrate; a capacitor dielectric film of an insulating metal oxide continuously formed over the plural lower electrodes; plural upper electrodes formed on the capacitor dielectric film in positions respectively corresponding to the plural lower electrodes; and plural transistors formed on the semiconductor substrate. The plural lower electrodes are respectively connected with source regions of the plural transistors.

    Abstract translation: 半导体存储器包括形成在半导体衬底上的多个下电极; 连续地形成在所述多个下电极上的绝缘金属氧化物的电容器电介质膜; 在分别对应于多个下电极的位置上形成在电容器电介质膜上的多个上电极; 以及形成在半导体基板上的多个晶体管。 多个下电极分别与多个晶体管的源极区域连接。

    Semiconductor memory device and method for manufacturing the same
    35.
    发明授权
    Semiconductor memory device and method for manufacturing the same 失效
    半导体存储器件及其制造方法

    公开(公告)号：US06326671B1

    公开(公告)日：2001-12-04

    申请号：US09452620

    申请日：1999-12-01

    Applicant: Yoshihisa Nagano ,  Keisuke Tanaka ,  Toru Nasu

    Inventor： Yoshihisa Nagano ,  Keisuke Tanaka ,  Toru Nasu

    IPC: H01L3107

    CPC classification number: H01L27/11502 ,  H01L21/76895 ,  H01L27/11507 ,  H01L28/40

    Abstract: A semiconductor memory device, includes: a semiconductor substrate including a transistor; a first protective insulating film for covering the semiconductor substrate; at least one data storage capacitor element formed on the first protective insulating film; a second protective insulating film for covering the first protective insulating film and the capacitor element; a hydrogen carrier layer; and an interconnection layer for electrically connecting the transistor and the capacitor element, wherein: the capacitor element includes a lower electrode formed on the first protective insulating film, a capacitor film formed on the lower electrode, and an upper electrode formed on the capacitor film, the capacitor film includes an insulating metal oxide, the second protective insulating film has a first contact hole reaching the upper electrode and a second contact hole reaching the lower electrode, and the hydrogen barrier layer is provided in the first and second contact holes, so as not to expose the upper and the lower electrodes.

    Abstract translation: 一种半导体存储器件，包括：包括晶体管的半导体衬底; 用于覆盖半导体衬底的第一保护绝缘膜; 形成在所述第一保护绝缘膜上的至少一个数据存储电容器元件; 用于覆盖第一保护绝缘膜和电容器元件的第二保护绝缘膜; 氢载体层; 以及用于电连接所述晶体管和所述电容器元件的互连层，其中：所述电容器元件包括形成在所述第一保护绝缘膜上的下电极，形成在所述下电极上的电容器膜，以及形成在所述电容器膜上的上电极， 电容器膜包括绝缘金属氧化物，第二保护绝缘膜具有到达上电极的第一接触孔和到达下电极的第二接触孔，并且氢阻挡层设置在第一和第二接触孔中，因此 不暴露上下电极。

    Method for manufacturing capacitor element
    36.
    发明授权
    Method for manufacturing capacitor element 失效
    电容元件制造方法

    公开(公告)号：US6100100A

    公开(公告)日：2000-08-08

    申请号：US122239

    申请日：1998-07-24

    Applicant: Yoshihisa Nagano ,  Yasuhiro Shimada ,  Eiji Fujii

    Inventor： Yoshihisa Nagano ,  Yasuhiro Shimada ,  Eiji Fujii

    IPC: H01L21/302 ,  H01L21/02 ,  H01L21/306 ,  H01L21/3065 ,  H01L21/3213 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/108 ,  H01L21/00 ,  H01L21/20

    CPC classification number: H01L28/60 ,  H01L21/32136 ,  H01L21/02052 ,  H01L28/55

    Abstract: The method of this invention provides a method for manufacturing a capacitor element composed of films. The films have a precise etched shape without a residue that may be generated as a reaction product in a dry-etching process. In this invention, washing in a non-oxidizing atmosphere, inclining a side of a mask for etching or heating a substrate prevents the reaction product from remaining on the film as a residue. The reaction product can be washed away with water, acid or organic solvent in inert gas. The reaction product can be removed from the side of the mask by sputter-etching with ions for dry-etching. The reaction product can be exhausted without adhering to the mask by heating the substrate at a temperature between 100.degree. C. and 400.degree. C.

    Abstract translation: 本发明的方法提供一种制造由薄膜构成的电容元件的方法。 这些膜具有精确的蚀刻形状，没有残留物，其可以在干法蚀刻工艺中作为反应产物产生。 在本发明中，在非氧化性气氛中洗涤，倾斜用于蚀刻或加热基材的掩模的侧面防止反应产物残留在膜上。 反应产物可用水，酸或有机溶剂在惰性气体中洗去。 通过溅射蚀刻用离子干法蚀刻，可以从掩模的侧面去除反应产物。 可以在100℃〜400℃的温度下加热基材，而不会粘附在掩模上而使反应产物排出。

    Semiconductor device and method of fabricating the same
    40.
    再颁专利
    Semiconductor device and method of fabricating the same 有权
    半导体装置及其制造方法

    公开(公告)号：USRE41625E1

    公开(公告)日：2010-09-07

    申请号：US10829476

    申请日：2004-04-22

    Applicant: Yoshihisa Nagano ,  Yasuhiro Uemoto

    Inventor： Yoshihisa Nagano ,  Yasuhiro Uemoto

    IPC: H01L29/94

    CPC classification number: H01L27/10894 ,  H01L27/10852 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/55

    Abstract: A protective insulating film is deposited over first and second field-effect transistors formed on a semiconductor substrate. A capacitor composed of a capacitor lower electrode, a capacitor insulating film composed of an insulating metal oxide film, and a capacitor upper electrode is formed on the protective insulating film. A first contact plug formed in the protective insulating film provides a direct connection between the capacitor lower electrode and an impurity diffusion layer of the first field-effect transistor. A second contact plug formed in the protective insulating film provides a direct connection between the capacitor upper electrode and an impurity diffusion layer of the second field-effect transistor.

    Abstract translation: 保护绝缘膜沉积在形成在半导体衬底上的第一和第二场效应晶体管上。 在保护绝缘膜上形成由电容器下电极构成的电容器，由绝缘金属氧化物膜构成的电容绝缘膜和电容器上电极。 形成在保护绝缘膜中的第一接触插塞提供电容器下电极和第一场效应晶体管的杂质扩散层之间的直接连接。 形成在保护绝缘膜中的第二接触插塞提供电容器上电极和第二场效应晶体管的杂质扩散层之间的直接连接。

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