-
公开(公告)号:US20140120836A1
公开(公告)日:2014-05-01
申请号:US14150392
申请日:2014-01-08
申请人: Shahriar Rokhsaz , Edwin de Angel
发明人: Shahriar Rokhsaz , Edwin de Angel
IPC分类号: H04B5/00
CPC分类号: H03H7/40 , H03J3/20 , H03J2200/10 , H04B5/0037
摘要: A method and apparatus for detecting RF field strength. A field strength reference generator develops a field strength reference current as a function of a field strength of a received RF signal; and a field strength quantizer develops a digital field-strength value indicative of the field strength reference current. In one embodiment, detected field strength is used to dynamically vary the impedance of a tank circuit whereby, over time, induced current is maximized.
摘要翻译: 一种用于检测射频场强度的方法和装置。 场强参考发生器产生作为接收的RF信号的场强的函数的场强参考电流; 并且场强量化器产生指示场强参考电流的数字场强值。 在一个实施例中,使用检测的场强来动态地改变储能电路的阻抗,由此随着时间的推移,感应电流最大化。
-
公开(公告)号:US20120217311A1
公开(公告)日:2012-08-30
申请号:US13467925
申请日:2012-05-09
申请人: Shahriar Rokhsaz , Stanley Drobac
发明人: Shahriar Rokhsaz , Stanley Drobac
IPC分类号: G06K19/067 , H01P11/00
CPC分类号: H03J3/20 , G06K19/0726 , G06K19/07718 , H03J1/0075 , H03J2200/10 , Y10T29/49016
摘要: A method and apparatus for manufacturing thin RFID tags adapted to be mounted proximate an interfering substance, such as metal or liquid. Each tag comprises: a web substrate having a predetermined thickness; an antenna attached to the substrate; and an RFID integrated circuit connected to the antenna, the RFID integrated circuit comprising a tank circuit adapted to be tuned in response to an RF signal after the tag has been mounted proximate the interfering substance. In one embodiment, the tag is manufactured using roll-to-roll manufacturing technology.
摘要翻译: 用于制造适于安装在诸如金属或液体之类的干扰物质附近的薄RFID标签的方法和装置。 每个标签包括:具有预定厚度的网状基材; 安装在基板上的天线; 以及连接到所述天线的RFID集成电路,所述RFID集成电路包括适于在所述标签已经被安装在所述干扰物质附近之后响应于RF信号被调谐的音箱电路。 在一个实施例中,使用卷对卷制造技术制造标签。
-
公开(公告)号:US08081043B2
公开(公告)日:2011-12-20
申请号:US12462331
申请日:2009-08-01
申请人: Shahriar Rokhsaz
发明人: Shahriar Rokhsaz
IPC分类号: H03H7/40
CPC分类号: H03J3/20 , H03H7/40 , H03J2200/10
摘要: A method and apparatus for dynamically varying the impedance of a tank circuit whereby, over time, the response of the circuit to a received signal is maximized.
摘要翻译: 一种用于动态地改变储能电路的阻抗的方法和装置,由此随着时间的推移,电路对接收信号的响应最大化。
-
公开(公告)号:US20110025473A1
公开(公告)日:2011-02-03
申请号:US12845644
申请日:2010-07-28
申请人: Shahriar Rokhsaz , Jaeun Noh
发明人: Shahriar Rokhsaz , Jaeun Noh
IPC分类号: H04Q5/22
CPC分类号: H04L63/0853 , G05B2219/31304 , G06Q20/382 , G06Q20/3827 , G06Q20/388 , H04L63/0492 , Y02P90/10
摘要: In an RFID system, a method and apparatus for linking an RFID tag to an associated object. The system includes a relatively simple tag, a reader, a linker, and a store. The reader interrogates the tag for an ID and selectively provides the ID to the linker. The linker, in turn, uses the ID to provide back to the reader an associated Uniform Resource Identifier (“URI”). The reader then forwards the URI to the store. In response, the store returns to the reader the object associated with the ID via the URI. The disclosed method and apparatus provide more efficient and secure tag authentication.
摘要翻译: 在RFID系统中,用于将RFID标签与相关对象相关联的方法和装置。 该系统包括相对简单的标签,读取器,链接器和商店。 读者询问ID的标签,并选择性地向链接器提供ID。 链接器又使用ID向读者提供相关联的统一资源标识符(“URI”)。 然后,读者将URI转发到商店。 作为响应,商店通过URI向读写器返回与ID相关联的对象。 所公开的方法和装置提供更有效和安全的标签认证。
-
公开(公告)号:US07668238B1
公开(公告)日:2010-02-23
申请号:US11299975
申请日:2005-12-12
申请人: Shahriar Rokhsaz
发明人: Shahriar Rokhsaz
IPC分类号: H03K5/159
CPC分类号: H04L25/03146
摘要: A method and apparatus for advantageously utilizing the reset state of an RTZ shift register to guarantee proper data alignment at the feedback taps to facilitate decision feedback equalization (DFE). An input data stream (DATA) is sliced into an even data stream and an odd data stream. Each bit of the even data stream is propagated through RTZ latches and each bit of the odd data stream is propagated through RTZ latches. At any given instant in time, half of the RTZ latch outputs contain zero information, so that each latch output may be summed in a current mode without the need for any intervening logic. The input data stream is then summed in current mode with the feedback data and converted to voltage prior to sampling of the currently received data bit.
摘要翻译: 一种用于有利地利用RTZ移位寄存器的复位状态以保证在反馈抽头处适当数据对准以便于判决反馈均衡(DFE)的方法和装置。 输入数据流(DATA)被分割成偶数据流和奇数数据流。 偶数据流的每个位通过RTZ锁存器传播,奇数数据流的每一位通过RTZ锁存器传播。 在任何给定的时刻,RTZ锁存器输出的一半包含零信息,使得每个锁存器输出可以以当前模式相加,而不需要任何中间逻辑。 然后将输入数据流与当前模式与反馈数据相加,并在对当前接收到的数据位进行采样之前转换为电压。
-
公开(公告)号:US07586385B2
公开(公告)日:2009-09-08
申请号:US11601085
申请日:2006-11-18
申请人: Shahriar Rokhsaz
发明人: Shahriar Rokhsaz
IPC分类号: H03H7/40
CPC分类号: H03J3/20 , H03H7/40 , H03J2200/10
摘要: A method and apparatus for dynamically varying the impedance of a tank circuit whereby, over time, the response of the circuit to a received signal is maximized.
摘要翻译: 一种用于动态地改变储能电路的阻抗的方法和装置,由此随着时间的推移,电路对接收信号的响应最大化。
-
37.
公开(公告)号:US07515668B1
公开(公告)日:2009-04-07
申请号:US11044474
申请日:2005-01-26
申请人: Shahriar Rokhsaz
发明人: Shahriar Rokhsaz
CPC分类号: H04L7/033
摘要: A method for correcting sampling offset of a clock and data recovery circuit begins for consecutive data bits having a transition there between by sampling, using an edge sampling point, the transition to produce a sampled transition. The method continues by determining whether the sampled transition is of an intermediate value. The method continues when the sampled transition is not of the intermediate value, by adjusting sampling position of incoming data of the clock and data recovery circuit.
摘要翻译: 用于校正时钟和数据恢复电路的采样偏移的方法通过使用边缘采样点进行采样转换来产生采样转换而对其间具有转变的连续数据位开始。 该方法通过确定采样转换是否是中间值来继续。 当采样转换不是中间值时,通过调整时钟和数据恢复电路的输入数据的采样位置,继续该方法。
-
公开(公告)号:US07224760B1
公开(公告)日:2007-05-29
申请号:US10421512
申请日:2003-04-22
IPC分类号: H03D3/24
CPC分类号: H04L7/0331 , H03D13/003 , H03L7/087 , H03L7/0896 , H03L7/091 , H03L7/10
摘要: A high-speed, wide bandwidth data detection circuit includes a phase detection module, a data detection module, a loop filter, and a voltage controlled oscillator. The phase detection module is operably coupled to produce a controlled current based on a current mode mathematical manipulation of differences between an incoming data stream and a recovered clock. The phase detection module performs the current mode mathematical manipulations and produces the controlled current in the current domain. The data detection module is operably coupled to produce the detected data based on the incoming data stream and the recovered clock. The loop filter is operably coupled to convert the controlled current into a controlled voltage. The voltage controlled oscillator is operably coupled to convert the control voltage into the recovered clock.
摘要翻译: 高速,宽带宽数据检测电路包括相位检测模块,数据检测模块,环路滤波器和压控振荡器。 相位检测模块可操作地耦合以基于对输入数据流和恢复的时钟之间的差异的当前模式数学操作产生受控电流。 相位检测模块执行当前模式的数学操作并产生当前域中的受控电流。 数据检测模块可操作地耦合以基于输入数据流和恢复的时钟产生检测到的数据。 环路滤波器可操作地耦合以将受控电流转换成受控电压。 压控振荡器可操作地耦合以将控制电压转换成恢复的时钟。
-
公开(公告)号:US06995611B1
公开(公告)日:2006-02-07
申请号:US10684843
申请日:2003-10-14
申请人: Shahriar Rokhsaz
发明人: Shahriar Rokhsaz
IPC分类号: H03F3/45
CPC分类号: H04B5/00 , H03F3/45183 , H03F2203/45361 , H03F2203/45696 , H03F2203/45704
摘要: An inductive amplifier having a feed forward boost is provided, thereby improving the gain of the inductive amplifier at frequencies greater than 1 GigaHertz. The inductive amplifier includes a feed-forward boost circuit coupled to intermediate nodes of an inductive amplifier circuit, whereby the feed-forward boost circuit generates boost currents that are added to the currents of the inductive amplifier circuit. In one embodiment, the feed-forward boost circuit includes a boost current supply, a first boost transistor coupled between the current supply and a first intermediate node of the inductive amplifier circuit, and a second boost transistor coupled between the current supply and a second intermediate node of the inductive amplifier circuit. In one embodiment, the first and second boost transistors and the inductive amplifier circuit are controlled by the same differential input signals.
-
公开(公告)号:US06977959B2
公开(公告)日:2005-12-20
申请号:US10346435
申请日:2003-01-17
申请人: Brian T. Brunn , Ahmed Younis , Shahriar Rokhsaz
发明人: Brian T. Brunn , Ahmed Younis , Shahriar Rokhsaz
CPC分类号: H04L7/0331 , H03D13/003 , H03L7/087 , H03L7/0896 , H03L7/091 , H03L7/10
摘要: A clock recovery circuit that operates at a clock speed equal to one-half the input data rate is presented. The clock recovery circuit uses dual input latches to sample the incoming serial data on both the rising edge and falling edge of a half-rate clock signal to provide equivalent full data rate clock recovery. The clock recovery circuit functions to maintain the half-rate clock transitions in the center of the incoming serial data bits. The clock recovery circuit includes a phase detector, charge pump, controlled oscillation module and a feedback module. The phase detector produces information on the phase and data transitions in the incoming data signal to the charge pump. Generally, the circuit is delay insensitive and receives phase and transition information staggered relative to each other.
摘要翻译: 提出了以等于输入数据速率的一半的时钟速度工作的时钟恢复电路。 时钟恢复电路使用双输入锁存器在半速率时钟信号的上升沿和下降沿对采样的串行数据进行采样,以提供等效的全数据速率时钟恢复。 时钟恢复电路用于保持输入串行数据位中心的半速率时钟转换。 时钟恢复电路包括相位检测器,电荷泵,受控振荡模块和反馈模块。 相位检测器产生关于输入数据信号中的相位和数据转换到电荷泵的信息。 通常,电路是延迟不敏感的,并且相对于彼此交错地接收相位和转换信息。
-
-
-
-
-
-
-
-
-