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公开(公告)号:US20250132271A1
公开(公告)日:2025-04-24
申请号:US18912124
申请日:2024-10-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kyojin Hwang , Junso Pak , Heeseok Lee
IPC: H01L23/64 , H01L23/498 , H01L25/16 , H05K1/11 , H05K1/18
Abstract: A semiconductor package includes a printed circuit board including a circuit pattern and a silicon capacitor connected to the circuit pattern, a semiconductor chip mounted on the printed circuit board, and an external connection terminal attached below the printed circuit board, wherein the silicon capacitor is a stacked structure of a plurality of substrate structures, each of the plurality of substrate structures includes a silicon substrate, a capacitor structure, a via electrode penetrating through the silicon substrate around the capacitor structure, an upper bump pad disposed on top of the via electrode, and a lower bump pad disposed below the via electrode, and, in the plurality of substrate structures, neighboring silicon substrates are bonded to each other through the upper bump pad and the lower bump pad facing each other.
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公开(公告)号:US20250132263A1
公开(公告)日:2025-04-24
申请号:US19000811
申请日:2024-12-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hae-Jung YU , Kyung Suk OH
IPC: H01L23/538 , H01L21/48 , H01L21/683 , H01L23/00 , H01L23/13 , H01L23/31 , H01L25/00 , H01L25/065
Abstract: A semiconductor package includes a redistribution layer having a first surface and a second surface opposite to each other, the redistribution layer including a plurality of first redistribution pads on the first surface, a semiconductor chip on the second surface of the redistribution layer, an active surface of the semiconductor chip facing the redistribution layer, a plurality of conductive structures on the second surface of the redistribution layer, the plurality of conductive structures being spaced apart from the semiconductor chip, and a plurality of external connection terminals on and coupled to the conductive structures, the plurality of first redistribution pads have a pitch smaller than a pitch of the plurality of external connection terminals.
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公开(公告)号:US20250132256A1
公开(公告)日:2025-04-24
申请号:US18603656
申请日:2024-03-13
Applicant: Samsung Electronics Co., Ltd.
Inventor: JINTAE KIM , PANJAE PARK , KANG-ILL SEO
IPC: H01L23/528 , H01L27/092
Abstract: CMOS devices are provided. A CMOS device includes a PMOS transistor and an NMOS transistor. Moreover, the CMOS device includes a dual power rail having a front-side power rail and a back-side power rail that are both coupled to one of the PMOS transistor or the NMOS transistor. The PMOS transistor and the NMOS transistor are in a vertical transistor stack, or are side-by-side.
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公开(公告)号:US20250132249A1
公开(公告)日:2025-04-24
申请号:US18761886
申请日:2024-07-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Muryeong KUK , Dosun LEE , Seongheum CHOI , Hongkeun PARK , Giwoong SHIM
IPC: H01L23/522 , H01L23/528 , H01L23/532
Abstract: An interconnection structure may include a first insulating interlayer on a substrate, a first metal pattern on the substrate and passing through the first insulating interlayer, a seed metal layer pattern surrounding a portion of a sidewall of the first metal pattern and a bottom of the first metal pattern, and a second metal pattern. The second metal pattern may directly contact an uppermost surface of the seed metal layer pattern, the upper sidewall of the first metal pattern, and the upper surface of the first metal pattern. An upper sidewall and an upper surface of the first metal pattern may be exposed by the seed metal layer pattern. The second metal pattern may fill at least a recess between the first insulating interlayer and the first metal pattern.
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公开(公告)号:US20250132203A1
公开(公告)日:2025-04-24
申请号:US18758118
申请日:2024-06-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Song Yi BAEK , Geumbi MUN , Junga LEE , Okran KIM , Seyoung HWANG , Kyoungchul SHIN , Sungsoo YANG , Daekwang WOO
IPC: H01L21/768 , H01L21/311 , H01L21/3213
Abstract: A method for manufacturing a semiconductor device. The method may include forming an insulating interlayer on a substrate, forming tungsten patterns inside and on the insulating interlayer, forming an insulation pattern on the insulating interlayer to fill a space between the tungsten patterns, and the insulation pattern having a lowest point of an upper surface lower than an upper surface of each of the tungsten patterns, forming a preliminary tungsten oxide layer on the upper surface of each of the tungsten patterns, performing a first surface plasma treatment on the preliminary tungsten oxide layer to remove at least a portion of the preliminary tungsten oxide layer to form a tungsten oxide layer and a protective layer on the tungsten oxide layer, and forming an etch stop layer on the protective layer and the insulation pattern.
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公开(公告)号:US20250132202A1
公开(公告)日:2025-04-24
申请号:US18816416
申请日:2024-08-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Seokkyu Lee , Wonbin Shin , Kiseok Kim , Jihye Shim , Jeonggi Jin
IPC: H01L21/768
Abstract: A method of manufacturing a semiconductor package with a semiconductor chip including an active surface and an inactive surface opposite to the active surface is presented. The method includes attaching, to the active surface, a film structure including an insulating layer and a first seed layer contacting the insulating layer. A via hole is formed by penetrating the insulating layer and the first seed layer followed by a descumming the insulating layer and the first seed layer in which the via hole is formed. A second seed layer is formed on the insulating layer and on the first seed layer on which the descum process was performed. A photoresist pattern on the second seed layer enables forming a conductive via by filling both a space defined by the via hole with a conductive material and by filling a space defined by the photoresist pattern with the conductive material.
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公开(公告)号:US20250132185A1
公开(公告)日:2025-04-24
申请号:US18825121
申请日:2024-09-05
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jonghwa Kim , Daeho Min , Yunha Kim , Kwanghyun Cho , Kyeongbin Lim
IPC: H01L21/683 , H01L21/67
Abstract: A cooling system for semiconductor equipment includes a chamber, an electrostatic chuck in the chamber, a coolant pipe housing in at least one of the chamber and the electrostatic chuck, the coolant pipe housing having an internal space, a coolant pipe at least partially in the internal space of the coolant pipe housing, and a flow controller configured to control a flow velocity of the coolant flowing along the coolant pipe so that the flow velocity periodically reaches a highest speed and a lowest speed.
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公开(公告)号:US20250132137A1
公开(公告)日:2025-04-24
申请号:US18816957
申请日:2024-08-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hyun Seok Kim , Mukyeong Kim , Sejin Park , Iljeong Heo
Abstract: A scrubber includes a plasma treatment system, a hydrogen supply system, and a wet treatment system. The plasma treatment system performs a plasma treatment in which a process gas and a hydrogen gas are reacted using plasma. The hydrogen supply system supplies the hydrogen gas to the plasma treatment system. The wet treatment system performs a wet treatment in which a by-product generated by the plasma treatment is wet-treated.
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公开(公告)号:US20250132134A1
公开(公告)日:2025-04-24
申请号:US18781389
申请日:2024-07-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Taeil Cho , Kyungsun Kim , Juho Kim , Changgil Son
IPC: H01J37/32 , H01L21/67 , H01L21/683
Abstract: A gas supply assembly includes: a heat control plate including a heater and a cooler; a gas distribution plate below the heat control plate and including a process gas distribution passage with process gas delivered therethrough and a heat regulating gas distribution passage with heat regulating gas delivered therethrough; a heat transfer pad below the gas distribution plate and including a dielectric material pad including an electrode therein; and a showerhead including a spraying nozzle in communication with the process gas distribution passage and discharging the process gas. The heat transfer pad further includes a process gas movement channel in communication with the process gas distribution passage of the gas distribution plate and a heat regulating gas movement channel in communication with the heat regulating gas distribution passage of the gas distribution plate.
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公开(公告)号:US20250131736A1
公开(公告)日:2025-04-24
申请号:US18612385
申请日:2024-03-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jaeseok CHOI , Dongwook LEE , ByeongJu LEE , Younghwa JUNG , Young Rae CHO
Abstract: A processor-implemented method with object recognition includes obtaining sensor data comprising points representing a surrounding environment of a sensor, detecting, from the sensor data, a shaded region in which the points are not generated due to occlusion by a surrounding object, generating feature data using the shaded region, and performing object recognition for the surrounding environment of the sensor based on the feature data.
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