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公开(公告)号：US11300828B2
公开(公告)日：2022-04-12
申请号：US16769618
申请日：2020-03-04
Inventor： Peng Zhang , Guanghui Liu , Chao Wang
IPC: G02F1/13357 , G02F1/1333 , G02F1/1335
Abstract: A display device including a display panel and a backlight module are provided. The backlight module includes a backlight unit having a backlight hole; a light guide ring disposed inside the backlight hole, wherein the light guide ring comprises a light receiving surface provided away from the display panel and a light emitting surface provided near the display panel, and the light guide ring is configured to direct light beams to a display panel area corresponding to the backlight hole; and a light source component configured to provide a light source for the light guide ring.
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公开(公告)号：US10971530B2
公开(公告)日：2021-04-06
申请号：US16097279
申请日：2018-09-18
Inventor： Guanghui Liu , Peng He , Yong Xu , Fei Ai
IPC: H01L27/12
Abstract: A manufacturing method for TFT array substrate and TFT array substrate are disclosed. After depositing an electrode material layer and a metal material layer on the gate insulation layer and the active layer in sequence after the active layer above the gate electrode is formed. A photoresist pattern is formed on the metal material layer. The photoresist pattern includes a first and second photoresist blocks with different thicknesses. The metal material layer and the electrode material layer are etched using the photoresist pattern to form a contact electrode and pixel electrodes connected with two ends of the active layer and the source/drain electrodes on the contact electrode. The process is simple and can effectively reduce the contact resistance between the source/drain and the active layer and improve the quality of the product.
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公开(公告)号：US10957721B1
公开(公告)日：2021-03-23
申请号：US16309446
申请日：2018-09-18
Inventor： Lisheng Li , Guanghui Liu
Abstract: The CMOS LTPS TFT substrate manufacturing method, by a semi-transparent mask, forms a second photoresist pattern having a second photoresist section above a second poly-Si active layer where P-type ion heavy doping is to be performed as protection. Then, N-type ions are effectively prevented from being implanted into the second poly-Si active layer's second source/drain contact region when conducting N-type ion heaving doping to the first poly-Si active layer. There is no need to compensate P-type ions during the subsequent P-type ion heavy doping to the second poly-Si active layer for forming the second source/drain contact region. The present invention therefore reduces the productivity loss in the P-type ion heaving doping process and, as N-type ion heaving doping does not affect the PMOS transistors, enhances the electrical convergence of the PMOS transistors. Damage to the film lattice structure by the ion implantation is also reduced, thereby increasing the device reliability.
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公开(公告)号：US12283227B2
公开(公告)日：2025-04-22
申请号：US18247256
申请日：2023-02-08
Inventor： Chao Tian , Mingyue Li , Yanqing Guan , Haiming Cao , Fei Ai , Guanghui Liu
IPC: G09G3/32
Abstract: An embodiment of the present disclosure is directed to a display panel. The display panel includes a plurality of scan lines and a plurality of forward and reverse scan pull-down circuit. The plurality of scan lines is located on the display area. Each of the forward and reverse scan pull-down circuits includes a forward scan control module, a reverse scan control module, and a pull-down module located on a display area. The pull-down module includes an output terminal and a control terminal coupled to an output terminal of the forward scan control module and an output terminal of the reverse scan control module.
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公开(公告)号：US12271074B2
公开(公告)日：2025-04-08
申请号：US18591459
申请日：2024-02-29
Inventor： Bingkun Yin , Changchih Huang , Guanghui Liu
IPC: G02F1/1333 , G02F1/1335 , F21V8/00 , G02F1/1368
Abstract: The present application discloses a liquid crystal display panel and a method of manufacturing the same. The liquid crystal display panel includes a pixel area, and further includes: a glass substrate serving as a light guide plate; a reflective layer disposed on a side of the light guide plate; a grating structure disposed on a side of the light guide plate away from the reflective layer, and corresponding to the pixel area; a planarization layer disposed on a side of the grating structure away from the light guide plate; and a thin-film transistor layer disposed on a side of the planarization layer away from the light guide plate.
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Patent Agency Ranking
公开(公告)号：US12216356B2
公开(公告)日：2025-02-04
申请号：US17754382
申请日：2022-03-17
Inventor： Shaojun Hou , Chao Wang , Guanghui Liu
IPC: G02F1/1335 , F21V8/00 , G02F1/13357
Abstract: The present application provides a display device and a mobile terminal. The display device includes a display panel and a backlight module arranged on one side of the display panel. The display panel includes a first display area, a second display area arranged on one side of the first display area, and a third display area arranged within the second display area. The backlight module includes a via area, and the via area is arranged corresponding to the third display area. The backlight module includes a first light source arranged corresponding to the first display area and a second light source arranged corresponding to the second display area.
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公开(公告)号：US12136396B2
公开(公告)日：2024-11-05
申请号：US17430058
申请日：2021-06-08
Inventor： Chao Tian , Yanqing Guan , Guanghui Liu , Fei Ai
IPC: G09G3/3266 , G09G3/20 , G09G3/36
Abstract: The present application provides a display panel and a display device. An N-th auxiliary unit is arranged in a display area of the display panel. An output end of the N-th auxiliary unit is connected to an N-th scan line. By connecting the auxiliary unit arranged in the display area to the corresponding scan line, a falling edge of a scan signal transmitted in the scan line can have sharp falling or a rising edge of the scan signal can have sharp rising, which can alleviate a signal distortion problem caused by transmission delay in the display area.
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公开(公告)号：US12093596B2
公开(公告)日：2024-09-17
申请号：US17622795
申请日：2021-12-09
Inventor： Zemin Hu , Guowei Zha , Guanghui Liu , Zhifu Li , Xiaolin Yan , Wanliang Feng
IPC: G06F3/14
CPC classification number: G06F3/1438 , G06F3/1446
Abstract: The present application provides a distributed system on panel (SOP) display panel and a display system. The distributed SOP display panel includes a plurality of display modules and a plurality of functional modules. Each display module includes a plurality of display units. The functional modules include first functional modules and a second functional module. The first functional modules are electrically connected to the display units in adjacent display modules, the second functional module is electrically connected to the plurality of display modules, in order to alleviate a technical problem of improper layout of system functions of a conventional SOP display device.
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公开(公告)号：US12061397B2
公开(公告)日：2024-08-13
申请号：US17435143
申请日：2021-08-09
Inventor： Yantao Lu , Changwen Ma , Guanghui Liu , Chao Wang
IPC: G02F1/1343 , G02F1/1362 , G09G3/36 , G02F1/1368
CPC classification number: G02F1/134345 , G02F1/136286 , G09G3/3677 , G02F1/1368 , G09G2300/0408 , G09G2300/0426 , G09G2310/0248 , G09G2320/02
Abstract: A display panel and a display device are provided. The display panel comprises sub-pixel electrodes and data line groups. The data line group includes at least two sub-data line groups. The sub-pixel electrode includes at least two sub-pixel electrode sections. By dispersing the data lines in the data line group into each sub-data line group and arranging the plurality of the sub-data line groups on two sides of the sub-pixel electrode sections in each of the columns, the shading area of each of the data line groups can be reduced, thereby improving the problem of dark stripes on the display panel.
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公开(公告)号：US12020614B2
公开(公告)日：2024-06-25
申请号：US17441303
申请日：2021-08-06
Inventor： Haiming Cao , Chao Tian , Yanqing Guan , Fei Ai , Guanghui Liu
IPC: G09G3/3266 , G09G3/20
CPC classification number: G09G3/20 , G09G2310/0267 , G09G2310/08 , G09G2320/045
Abstract: A gate drive circuit and a display panel are provided. A pull-up module and a pull-down module of the gate drive circuit output a constant-voltage high potential to a second node, a third node, and a n-th stage gate drive signal through a P-type thin film transistor and output constant-voltage low potential through a N-type thin film transistor to the second node, the third node, and an n-th gate drive signal, thereby improving the stability of the output signal of the thin film transistor connected to the gate drive circuit and the key node.
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