公开(公告)号：US11227852B2

公开(公告)日：2022-01-18

申请号：US16854823

申请日：2020-04-21

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Honglin Guo ,  Jason Chien ,  Byron Lovell Williams ,  Jeffrey Alan West ,  Anderson Li ,  Arvin Nono Verdeflor

IPC: H01L23/00 ,  H01L21/56 ,  H01L25/00 ,  H01L23/495 ,  H01L23/31 ,  H01L25/065

Abstract: An integrated circuit and methods for packaging the integrated circuit. In one example, a method for packaging an integrated circuit includes connecting input/output pads of a first integrated circuit die to terminals of a lead frame via palladium coated copper wires. An oxygen plasma is applied to the first integrated circuit die and the palladium coated copper wires. The first integrated circuit die and the palladium coated copper wires are encapsulated in a mold compound after application of the oxygen plasma.

公开(公告)号：US10784193B2

公开(公告)日：2020-09-22

申请号：US16047889

申请日：2018-07-27

Applicant: Texas Instruments Incorporated

Inventor： Qi-Zhong Hong ,  Honglin Guo ,  Benjamin James Timmer ,  Gregory Boyd Shinn

IPC: H01L23/52 ,  H01L23/522 ,  H01L49/02

Abstract: An integrated circuit (IC) includes a substrate having a semiconductor surface layer with functional circuitry for realizing at least one circuit function, with an inter level dielectric (ILD) layer on a metal layer that is above the semiconductor surface layer. A thin film resistor (TFR) including a TFR layer is on the ILD layer. At least one vertical metal wall is on at least two sides of the TFR. The metal walls include at least 2 metal levels coupled by filled vias. The functional circuitry is outside the metal walls.

公开(公告)号：US09875846B2

公开(公告)日：2018-01-23

申请号：US15042319

申请日：2016-02-12

Applicant: Texas Instruments Incorporated

Inventor： Honglin Guo ,  Byron Lovell Williams

IPC: H01G2/00 ,  H01G2/08 ,  H01B3/30 ,  H01G4/18 ,  H01G4/018

CPC classification number: H01G2/08 ,  H01B3/306 ,  H01G4/018 ,  H01G4/18 ,  H01G4/33 ,  H01G4/40 ,  Y10T29/42

Abstract: A heated capacitor runs current through either a lower metal plate, an upper metal plate, a lower metal trace that lies adjacent to a lower metal plate, an upper metal trace that lies adjacent to an upper metal plate, or both a lower metal trace that lies adjacent to a lower metal plate and an upper metal trace that lies adjacent to an upper metal plate to generate heat from the resistance to remove moisture from a moisture-sensitive insulating layer.