STRUCTURE OF DIELECTRIC GRID FOR A SEMICONDUCTOR DEVICE
    25.
    发明申请
    STRUCTURE OF DIELECTRIC GRID FOR A SEMICONDUCTOR DEVICE 有权
    用于半导体器件的电介质网格结构

    公开(公告)号:US20160111465A1

    公开(公告)日:2016-04-21

    申请号:US14981787

    申请日:2015-12-28

    IPC分类号: H01L27/146

    摘要: A method of forming an image sensor device is disclosed. The method includes providing a substrate having sensor elements in a pixel region and having no sensor elements in a non-pixel region. The method further includes forming metal pillars over the pixel region and a metal shield layer over the non-pixel region. The metal pillars are disposed above spaces between adjacent sensor elements. The method further includes depositing a dielectric layer over the metal pillars and the metal shield layer; and etching the dielectric layer to form first and second trenches. The first trenches are formed over the pixel region and the second trenches are formed over the non-pixel region. Each of the first trenches aligns to a respective sensor element and is surrounded by the dielectric layer at its bottom and sidewall surfaces.

    摘要翻译: 公开了一种形成图像传感器装置的方法。 该方法包括在像素区域中提供具有传感器元件的基板,并且在非像素区域中不具有传感器元件。 该方法还包括在像素区域上形成金属柱和在非像素区域上形成金属屏蔽层。 金属支柱设置在相邻传感器元件之间的空间之上。 该方法还包括在金属柱和金属屏蔽层之上沉积介电层; 并蚀刻介电层以形成第一和第二沟槽。 第一沟槽形成在像素区域上,并且第二沟槽形成在非像素区域上。 每个第一沟槽对准相应的传感器元件,并且在其底部和侧壁表面处被电介质层包围。

    SEMICONDUCTOR DEVICE WITH AIR-VOID IN SPACER

    公开(公告)号:US20220352307A1

    公开(公告)日:2022-11-03

    申请号:US17866772

    申请日:2022-07-18

    摘要: A semiconductor device includes a substrate, a gate oxide layer formed on the substrate, a gate formed on the gate oxide layer, and a spacer formed adjacent the gate and over the substrate. The spacer includes a void filled with air to prevent leakage of charge to and from the gate, thereby reducing data loss and providing better memory retention. The reduction in charge leakage results from reduced parasitic capacitances, fringing capacitances, and overlap capacitances due to the low dielectric constant of air relative to other spacer materials. The spacer can include multiple layers such as oxide and nitride layers. In some embodiments, the semiconductor device is a multiple-time programmable (MTP) memory device.