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    TRANSMITTER AND REPETITION METHOD THEREOF
    21.
    发明申请
    TRANSMITTER AND REPETITION METHOD THEREOF 审中-公开
    发射机和重发方法

    公开(公告)号：US20160218824A1

    公开(公告)日：2016-07-28

    申请号：US15003969

    申请日：2016-01-22

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Kyung-joong KIM ,  Se-ho MYUNG ,  Hong-sil JEONG

    IPC: H04L1/00 ,  H03M13/00 ,  H03M13/11

    CPC classification number: H04L1/0041 ,  H03M13/1102 ,  H03M13/152 ,  H03M13/255 ,  H03M13/271 ,  H03M13/2778 ,  H03M13/2906 ,  H04L1/0068 ,  H04L1/007 ,  H04L1/0071

    Abstract: A transmitter is provided. The transmitter includes at least one processor configured to implement: a Low Density Parity Check (LDPC) encoder which encodes input bits to generate an LDPC codeword including the input bits and parity bits; a puncturer which calculates a number of bits to be punctured in the parity bits and punctures the parity bits based on the calculated number of bits; and a repeater which selects at least a part of bits of the LDPC codeword based on a repetition pattern, and repeats the selected bits after the parity bits, wherein the repetition pattern is a pattern for selecting at least one bit group including the selected bits among a plurality of bit groups configuring the LDPC codeword.

    Abstract translation: 提供发射机。 所述发射机包括至少一个处理器，其被配置为实现：低密度奇偶校验（LDPC）编码器，其对输入比特进行编码以生成包括所述输入比特和奇偶校验比特的LDPC码字; 穿刺器，其计算在所述奇偶校验位中要被穿孔的比特数，并且基于所计算的比特数来对所述奇偶校验比特进行穿刺; 以及中继器，其基于重复模式选择所述LDPC码字的比特的至少一部分，并且在所述奇偶校验位之后重复所选择的比特，其中所述重复模式是用于选择包括所选择的比特中的至少一个比特组的模式， 配置LDPC码字的多个比特组。

    TRANSMITTER, RECEIVER, AND SIGNAL PROCESSING METHOD THEREOF
    22.
    发明申请
    TRANSMITTER, RECEIVER, AND SIGNAL PROCESSING METHOD THEREOF 有权
    发射机，接收机和信号处理方法

    公开(公告)号：US20150341144A1

    公开(公告)日：2015-11-26

    申请号：US14717142

    申请日：2015-05-20

    Applicant: SAMSUNG ELECTRONICS CO., LTD. ,  POSTECH ACADEMY-INDUSTRY FOUNDATION

    Inventor： Se-ho MYUNG ,  Kyung-joong KIM ,  Hong-sil JEONG ,  Kyeongcheol YANG ,  Seung-chan LIM

    IPC: H04L1/00 ,  H04L27/34

    CPC classification number: H04L1/0071 ,  H04L1/00 ,  H04L1/0057 ,  H04L1/0063 ,  H04L27/34

    Abstract: A transmitter, a receiver and signal processing methods are provided. The transmitter includes: an encoder configured to perform encoding on an information word based on a parity check matrix to generate a codeword including a plurality of non-binary symbols; an interleaver configured to interleave the codeword; and as modulator configured to modulate the interleaved codeword to generate a plurality of modulation symbols. The interleaver is configured to interleave the codeword such that the modulator maps a predetermined non-binary symbol from among the plurality of non-binary symbols constituting the codeword to a predetermined position in a modulation symbol among the plurality of modulation symbols.

    Abstract translation: 提供发射机，接收机和信号处理方法。 发射机包括：编码器，被配置为基于奇偶校验矩阵对信息字进行编码，以生成包括多个非二进制符号的码字; 被配置为交织所述码字的交织器; 以及作为调制器，被配置为调制交织的码字以产生多个调制符号。 交织器被配置为交织码字，使得调制器将构成码字的多个非二进制符号之间的预定非二进制符号映射到多个调制符号之中的调制符号中的预定位置。

    TRANSMITTING APPARATUS AND SIGNAL PROCESSING METHOD THEREOF
    23.
    发明申请
    TRANSMITTING APPARATUS AND SIGNAL PROCESSING METHOD THEREOF 审中-公开
    发送装置及其信号处理方法

    公开(公告)号：US20150089321A1

    公开(公告)日：2015-03-26

    申请号：US14497635

    申请日：2014-09-26

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Se-ho MYUNG ,  Hong-sil JEONG ,  Kyung-joong KIM

    IPC: H03M13/27 ,  H03M13/25 ,  H03M13/11

    CPC classification number: H03M13/271 ,  H03M13/036 ,  H03M13/11 ,  H03M13/1102 ,  H03M13/116 ,  H03M13/1165 ,  H03M13/1177 ,  H03M13/152 ,  H03M13/255 ,  H03M13/2707 ,  H03M13/2792 ,  H03M13/2906

    Abstract: A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes: an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding; an interleaver configured to interleave the LDPC codeword; and a modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol. The interleaver is formed of a plurality of columns including a plurality of rows, respectively, and comprises: a block interleaver configured to divide each of the plurality of columns into a first part and a second part, and interleave a plurality of bit groups constituting the LDPC codeword, all bit groups interleaved by the first part are interleaved as bits included in a same bit group are written in a same column of the first part, at least one bit group interleaved by the second part is interleaved as bits included in the at least one bit group are divided and written in at least two columns constituting the second part.

    Abstract translation: 提供发送装置和接收装置。 发送装置包括：编码器，被配置为通过执行LDPC编码来生成低密度奇偶校验（LDPC）码字; 配置为交织所述LDPC码字的交织器; 以及调制器，被配置为根据调制方法来调制交织的LDPC码字以产生调制符号。 交织器分别由包括多个行的多个列形成，并且包括：块交织器，被配置为将多个列中的每一个划分为第一部分和第二部分，并且交织构成该多个列的多个位组 LDPC码字，由第一部分交织的所有比特组被交织，因为包含在同一比特组中的比特被写入第一部分的同一列中，由第二部分交织的至少一个比特组被交织为包括在该 至少一个位组被划分并写入构成第二部分的至少两列中。

    TRANSMITTING APPARATUS AND SIGNAL PROCESSING METHOD THEREOF
    25.
    发明申请
    TRANSMITTING APPARATUS AND SIGNAL PROCESSING METHOD THEREOF 有权

    公开(公告)号：US20220385399A1

    公开(公告)日：2022-12-01

    申请号：US17870981

    申请日：2022-07-22

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Se-ho MYUNG ,  Hong-si JEONG ,  Kyung-joong KIM

    IPC: H04L1/00 ,  H03M13/11 ,  H03M13/25 ,  H03M13/27 ,  H03M13/00

    Abstract: A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding, an interleaver configured to interleave the LDPC codeword, and a modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol. The interleaver performs interleaving by dividing the LDPC codeword into a plurality of groups, rearranging an order of the plurality of groups in group units, and dividing the plurality of rearranged groups based on a modulation order according to the modulation method.

    RECEIVER AND METHOD FOR PROCESSING A SIGNAL THEREOF
    26.
    发明申请
    RECEIVER AND METHOD FOR PROCESSING A SIGNAL THEREOF 有权

    公开(公告)号：US20220294559A1

    公开(公告)日：2022-09-15

    申请号：US17827883

    申请日：2022-05-30

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Se-ho MYUNG ,  Kyung-joong KIM ,  Hong-sil JEONG

    IPC: H04L1/00 ,  H03M13/11 ,  H03M13/00 ,  H03M13/25 ,  H03M13/29 ,  H03M13/37

    Abstract: A receiver is provided. The receiver includes: a first decoder configured to decode a superposition-coded signal by using a parity check matrix to generate Low Density Parity Check (LDPC) information word bits and first parity bits corresponding to a first layer signal; an encoder configured to encode the LDPC information word bits and the first parity bits to generate second parity bits, or encode the LDPC information word bits to generate the first parity bits and the second parity bits, by using the parity check matrix; and a second decoder configured to decode a signal which is generated by removing the first layer signal, corresponding to the LDPC information word bits, the first parity bits, and the second parity bits, from the superposition-coded signal, to reconstruct bits transmitted through the second layer signal.

    TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF
    30.
    发明申请
    TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF 审中-公开

    公开(公告)号：US20190312599A1

    公开(公告)日：2019-10-10

    申请号：US16446697

    申请日：2019-06-20

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Kyung-joong KIM ,  Se-ho MYUNG ,  Hong-sil JEONG ,  Daniel Ansorregui LOBETE ,  Belkacem MOUHOUCHE

    IPC: H03M13/27 ,  H04L1/00 ,  H03M13/11 ,  H03M13/25 ,  H03M13/00

    Abstract: A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC encoding of input bits based on a parity check matrix including information word bits and parity bits, the LDPC codeword including a plurality of bit groups each including a plurality of bits; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the interleaver is further configured to interleave the LDPC codeword such that a bit included in a predetermined bit group from among the plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol.

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