公开(公告)号：US20240234583A1

公开(公告)日：2024-07-11

申请号：US18397325

申请日：2023-12-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junyoung KWON ,  Kyung-Eun BYUN ,  Minsu SEOL

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775

CPC classification number: H01L29/78696 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/7869

Abstract: Provided are a semiconductor device including a two-dimensional (2D) material and an electronic device including the semiconductor device. The semiconductor device may include a channel layer including a two-dimensional (2D) semiconductor material, a channel portion, and an extension portion on both sides of the channel portion, a source electrode and a drain electrode respectively on both sides of the channel layer, a gate electrode surrounding the channel portion, a first insulating layer between the channel portion of the channel layer and the gate electrode, and a second insulating layer on the extension portion of the channel layer. The second insulating layer may include a different material than a material of the first insulating layer. The second insulating layer may include a n-type dopant or p-type dopant. A dopant in the extension portion may be the same as a dopant in the second insulating layer.

公开(公告)号：US20240222524A1

公开(公告)日：2024-07-04

申请号：US18507905

申请日：2023-11-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minsu SEOL ,  Eunkyu LEE ,  Junyoung KWON ,  Kyung-Eun BYUN

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/78696 ,  H01L29/0603 ,  H01L29/66795 ,  H01L29/785

Abstract: Provided are a field effect transistor, a method of manufacturing the field effect transistor, and an electronic device and an electronic apparatus each including the field effect transistor. The field effect transistor includes a channel layer disposed on a substrate, a high-k gate insulating layer disposed on the channel layer, a first composite electrode layer connected to a first side of the channel layer, a second composite electrode layer connected to a second side of the channel layer, and a gate electrode layer disposed on the gate insulating layer. At least one of the first and second composite electrode layers includes a contact resistance reducing layer in contact with the channel layer and a conductive layer in contact with the contact resistance reducing layer. The conductive layer is spaced apart from the channel layer.

公开(公告)号：US20240178307A1

公开(公告)日：2024-05-30

申请号：US18518729

申请日：2023-11-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minsu SEOL ,  Sungil PARK ,  Jaehyun PARK ,  Kyung-Eun BYUN ,  Eunkyu LEE ,  Junyoung KWON ,  Minseok YOO

IPC: H01L29/76 ,  H01L29/24 ,  H01L29/78

CPC classification number: H01L29/7606 ,  H01L29/24 ,  H01L29/78391

Abstract: A semiconductor device may include a multi-layer gate dielectric layer and an electronic apparatus including the semiconductor device. The semiconductor device may include a channel layer including a two-dimensional semiconductor material, a gate dielectric layer on a first area of the channel layer, a gate electrode on the gate dielectric layer, and source and drain electrodes in a second area of the channel layer. The gate dielectric layer may include a high-k dielectric layer and an intermediate dielectric layer. The intermediate dielectric layer may be between the high-k dielectric layer and the channel layer. A dielectric constant of the intermediate dielectric layer may be less than a dielectric constant of the high-k dielectric layer.

公开(公告)号：US20240021676A1

公开(公告)日：2024-01-18

申请号：US18331463

申请日：2023-06-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changhyun KIM ,  Minsu SEOL ,  Junyoung KWON ,  Keunwook SHIN ,  Minseok YOO

IPC: H01L29/18 ,  H01L29/423 ,  H01L29/786 ,  H01L29/417 ,  H01L29/06 ,  H01L29/775 ,  H10B10/00 ,  H10B43/27

CPC classification number: H01L29/18 ,  H01L29/42392 ,  H01L29/78696 ,  H01L29/41733 ,  H01L29/0673 ,  H01L29/775 ,  H10B10/125 ,  H10B43/27

Abstract: A semiconductor device includes a channel including a two-dimensional (2D) semiconductor material, a source electrode and a drain electrode electrically connected to opposite sides of the channel, respectively, a transition metal oxide layer on the channel and including a transition metal oxide, a dielectric layer on the transition metal oxide layer and including a high-k material, and a gate electrode on the dielectric layer.

公开(公告)号：US20220077321A1

公开(公告)日：2022-03-10

申请号：US17370480

申请日：2021-07-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minsu SEOL ,  Minhyun LEE ,  Junyoung KWON ,  Hyeonjin SHIN ,  Minseok YOO

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/16 ,  H01L29/24 ,  H01L29/423 ,  H01L29/76 ,  H01L21/02 ,  H01L29/66

Abstract: Disclosed are a field effect transistor and a method of manufacturing the same. The field effect transistor includes a source electrode on a substrate, a drain electrode separated from the source electrode, and channels connected between the source electrode and the drain electrode, gate insulating layers, and a gate electrode. The channels may have a hollow closed cross-sectional structure when viewed in a first cross-section formed by a plane across the source electrode and the drain electrode in a direction perpendicular to the substrate. The gate insulating layers may be in the channels. The gate electrode may be insulated from the source electrode and the drain electrode by the gate insulating layers.