公开(公告)号：US20180219017A1

公开(公告)日：2018-08-02

申请号：US15422307

申请日：2017-02-01

Applicant: Micron Technology, Inc.

Inventor： Akira Goda ,  Yushi Hu

IPC: H01L27/1157 ,  H01L27/11582 ,  H01L21/8234

Abstract: Some embodiments include a NAND memory array which has a vertical stack of alternating insulative levels and wordline levels. The wordline levels have terminal ends corresponding to control gate regions. Charge-trapping material is along the control gate regions of the wordline levels, and is spaced form the control gate regions by charge-blocking material. The charge-trapping material along vertically adjacent wordline levels is spaced by intervening regions through which charge migration is impeded. Channel material extends vertically along the stack and is spaced from the charge-trapping material by charge-tunneling material. Some embodiments include methods of forming NAND memory arrays.

公开(公告)号：US20180175039A1

公开(公告)日：2018-06-21

申请号：US15895587

申请日：2018-02-13

Applicant: Micron Technology, Inc.

Inventor： Jaydeb Goswami ,  Zailong Bian ,  Yushi Hu ,  Eric R. Blomiley ,  Jaydip Guha ,  Thomas Gehrke

IPC: H01L27/108 ,  H01L29/423 ,  H01L23/532 ,  H01L29/08 ,  H01L29/49

CPC classification number: H01L27/10823 ,  H01L23/5283 ,  H01L23/53252 ,  H01L23/53261 ,  H01L23/53266 ,  H01L27/10876 ,  H01L27/10891 ,  H01L29/0847 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/4966

Abstract: Some embodiments include a conductive structure which has a first conductive material having a work function of at least 4.5 eV, and a second conductive material over and directly against the first conductive material. The second conductive material has a work function of less than 4.5 eV, and is shaped as an upwardly-opening container. The conductive structure includes a third conductive material within the upwardly-opening container shape of the second conductive material and directly against the second conductive material. The third conductive material is a different composition relative to the second conductive material. Some embodiments include wordlines, and some embodiments include transistors.

公开(公告)号：US20180138182A1

公开(公告)日：2018-05-17

申请号：US15349808

申请日：2016-11-11

Applicant: Micron Technology, Inc.

Inventor： Jaydeb Goswami ,  Zailong Bian ,  Yushi Hu ,  Eric R. Blomiley ,  Jaydip Guha ,  Thomas Gehrke

IPC: H01L27/108 ,  H01L29/423 ,  H01L29/08 ,  H01L29/49 ,  H01L23/532

CPC classification number: H01L27/10823 ,  H01L23/5283 ,  H01L23/53252 ,  H01L23/53261 ,  H01L23/53266 ,  H01L27/10876 ,  H01L27/10891 ,  H01L29/0847 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/4966

Abstract: Some embodiments include a conductive structure which has a first conductive material having a work function of at least 4.5 eV, and a second conductive material over and directly against the first conductive material. The second conductive material has a work function of less than 4.5 eV, and is shaped as an upwardly-opening container. The conductive structure includes a third conductive material within the upwardly-opening container shape of the second conductive material and directly against the second conductive material. The third conductive material is a different composition relative to the second conductive material. Some embodiments include wordlines, and some embodiments include transistors.

公开(公告)号：US09972628B1

公开(公告)日：2018-05-15

申请号：US15349808

申请日：2016-11-11

Applicant: Micron Technology, Inc.

Inventor： Jaydeb Goswami ,  Zailong Bian ,  Yushi Hu ,  Eric R. Blomiley ,  Jaydip Guha ,  Thomas Gehrke

IPC: H01L29/49 ,  H01L27/108 ,  H01L29/423 ,  H01L29/08 ,  H01L23/532

CPC classification number: H01L27/10823 ,  H01L23/5283 ,  H01L23/53252 ,  H01L23/53261 ,  H01L23/53266 ,  H01L27/10876 ,  H01L27/10891 ,  H01L29/0847 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/4966

Abstract: Some embodiments include a conductive structure which has a first conductive material having a work function of at least 4.5 eV, and a second conductive material over and directly against the first conductive material. The second conductive material has a work function of less than 4.5 eV, and is shaped as an upwardly-opening container. The conductive structure includes a third conductive material within the upwardly-opening container shape of the second conductive material and directly against the second conductive material. The third conductive material is a different composition relative to the second conductive material. Some embodiments include wordlines, and some embodiments include transistors.

公开(公告)号：US09741732B2

公开(公告)日：2017-08-22

申请号：US14830517

申请日：2015-08-19

Applicant: Micron Technology, Inc.

Inventor： Justin B. Dorhout ,  David Daycock ,  Kunal R. Parekh ,  Martin C. Roberts ,  Yushi Hu

IPC: H01L29/76 ,  H01L27/115 ,  H01L27/02 ,  H01L27/11582 ,  H01L29/66

CPC classification number: H01L27/11582 ,  H01L29/66666 ,  H01L29/76

Abstract: Some embodiments include an integrated structure having a conductive material, a select device gate material over the conductive material, and vertically-stacked conductive levels over the select device gate material. Vertically-extending monolithic channel material is adjacent the select device gate material and the conductive levels. The monolithic channel material contains a lower segment adjacent the select device gate material and an upper segment adjacent the conductive levels. A first vertically-extending region is between the lower segment of the monolithic channel material and the select device gate material. The first vertically-extending region contains a first material. A second vertically-extending region is between the upper segment of the monolithic channel material and the conductive levels. The second vertically-extending region contains a material which is different in composition from the first material.

公开(公告)号：US20210082703A1

公开(公告)日：2021-03-18

申请号：US16950115

申请日：2020-11-17

Applicant: Micron Technology, Inc.

Inventor： Yushi Hu ,  Shu Qin

IPC: H01L21/225 ,  H01L27/11556 ,  H01L27/11582 ,  H01L21/28

Abstract: Some embodiments include an integrated assembly having a first semiconductor structure containing heavily-doped silicon, a germanium-containing interface material over the first semiconductor structure, and a second semiconductor structure over the germanium-containing interface material. The second semiconductor structure has a heavily-doped lower region adjacent the germanium-containing interface material and has a lightly-doped upper region above the heavily-doped lower region. The lightly-doped upper region and heavily-doped lower region are majority doped to a same dopant type, and join to one another along a boundary region. Some embodiments include an integrated assembly having germanium oxide between a first silicon-containing structure and a second silicon-containing structure. Some embodiments include methods of forming assemblies.

公开(公告)号：US10777651B2

公开(公告)日：2020-09-15

申请号：US16201624

申请日：2018-11-27

Applicant: Micron Technology, Inc.

Inventor： Yushi Hu ,  John Mark Meldrim ,  Eric Blomiley ,  Everett Allen McTeer ,  Matthew J. King

IPC: H01L29/49 ,  H01L21/28 ,  H01L29/66 ,  H01L29/78 ,  H01L29/06

Abstract: Some embodiments disclose a gate stack having a gate (e.g., polysilicon (poly) material) horizontally between shallow trench isolations (STIs), a tungsten silicide (WSix) material over the gate and the STIs, and a tungsten silicon nitride (WSiN) material on a top surface of the WSix material. Some embodiments disclose a gate stack having a gate between STIs, a first WSix material over the gate and the STIs, a WSiN interlayer material on a top surface of the first WSix material, and a second WSix material on a top surface of the WSiN interlayer material. Additional embodiments are disclosed.

公开(公告)号：US20190333934A1

公开(公告)日：2019-10-31

申请号：US16438334

申请日：2019-06-11

Applicant: Micron Technology, Inc.

Inventor： Justin B. Dorhout ,  David Daycock ,  Kunal R. Parekh ,  Martin C. Roberts ,  Yushi Hu

IPC: H01L27/11582 ,  H01L29/78 ,  H01L29/66

Abstract: Some embodiments include an integrated structure having a conductive material, a select device gate material over the conductive material, and vertically-stacked conductive levels over the select device gate material. Vertically-extending monolithic channel material is adjacent the select device gate material and the conductive levels. The monolithic channel material contains a lower segment adjacent the select device gate material and an upper segment adjacent the conductive levels. A first vertically-extending region is between the lower segment of the monolithic channel material and the select device gate material. The first vertically-extending region contains a first material. A second vertically-extending region is between the upper segment of the monolithic channel material and the conductive levels. The second vertically-extending region contains a material which is different in composition from the first material.

公开(公告)号：US20190198528A1

公开(公告)日：2019-06-27

申请号：US16290169

申请日：2019-03-01

Applicant: Micron Technology, Inc.

Inventor： Justin B. Dorhout ,  David Daycock ,  Kunal R. Parekh ,  Martin C. Roberts ,  Yushi Hu

IPC: H01L27/11582 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L27/11582 ,  H01L29/66666 ,  H01L29/76 ,  H01L29/7827

Abstract: Some embodiments include an integrated structure having a conductive material, a select device gate material over the conductive material, and vertically-stacked conductive levels over the select device gate material. Vertically-extending monolithic channel material is adjacent the select device gate material and the conductive levels. The monolithic channel material contains a lower segment adjacent the select device gate material and an upper segment adjacent the conductive levels. A first vertically-extending region is between the lower segment of the monolithic channel material and the select device gate material. The first vertically-extending region contains a first material. A second vertically-extending region is between the upper segment of the monolithic channel material and the conductive levels. The second vertically-extending region contains a material which is different in composition from the first material.

公开(公告)号：US10256098B2

公开(公告)日：2019-04-09

申请号：US14927217

申请日：2015-10-29

Applicant: Micron Technology, Inc.

Inventor： Yushi Hu ,  Shu Qin

IPC: H01L21/28 ,  H01L21/225 ,  H01L27/11556 ,  H01L27/11582

Abstract: Some embodiments include an integrated assembly having a first semiconductor structure containing heavily-doped silicon, a germanium-containing interface material over the first semiconductor structure, and a second semiconductor structure over the germanium-containing interface material. The second semiconductor structure has a heavily-doped lower region adjacent the germanium-containing interface material and has a lightly-doped upper region above the heavily-doped lower region. The lightly-doped upper region and heavily-doped lower region are majority doped to a same dopant type, and join to one another along a boundary region. Some embodiments include an integrated assembly having germanium oxide between a first silicon-containing structure and a second silicon-containing structure. Some embodiments include methods of forming assemblies.