公开(公告)号：US20160093533A1

公开(公告)日：2016-03-31

申请号：US14499266

申请日：2014-09-29

申请人： Kai Yun Yow ,  Chee Seng Foong ,  Lan Chu Tan

发明人： Kai Yun Yow ,  Chee Seng Foong ,  Lan Chu Tan

IPC分类号： H01L21/78 ,  H01L23/28 ,  H01L23/535 ,  H01L23/544 ,  H01L23/00 ,  H01L21/56

CPC分类号： H01L21/78 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/544 ,  H01L24/11 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2223/54486 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/49171 ,  H01L2224/83132 ,  H01L2224/85132 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599

摘要： A method of assembling semiconductor devices with semiconductor dies of alternative different configurations uses the same substrate panel. The dies of the selected configuration are placed in an array, mounted, and connected to internal electrical contact pads on a first face of the panel using main fiducial markings and an array of subsidiary fiducial markings corresponding universally to arrays of semiconductor dies of the different alternative configurations. The pitch of the subsidiary fiducial markings is equal to the spacing between adjacent rows of the internal electrical contact pads on the panel and is a sub-multiple of the pitch of the array of dies.

摘要翻译： 使用替代不同配置的半导体管芯组装半导体器件的方法使用相同的衬底面板。 所选择的配置的管芯被放置在阵列中，安装并连接到面板的第一面上的内部电接触焊盘，使用主要的基准标记和通常对应于不同替代的半导体管芯阵列的辅助基准标记阵列 配置 附属基准标记的间距等于面板上的内部电接触焊盘的相邻行之间的间隔，并且是管芯阵列的间距的次倍数。

公开(公告)号：US20150183131A1

公开(公告)日：2015-07-02

申请号：US14141471

申请日：2013-12-27

申请人： Chee Seng Foong ,  Wen Shi Koh ,  Kai Yun Yow

发明人： Chee Seng Foong ,  Wen Shi Koh ,  Kai Yun Yow

IPC分类号： B28D5/02 ,  B24D3/06 ,  B24D5/14

CPC分类号： B28D5/022 ,  B24D3/06 ,  B24D5/14

摘要： A dicing blade suitable for cutting a semiconductor wafer has an edge of fine grit for polishing a top surface of the wafer and a protruding part of coarse grit for making an initial cut into the wafer. The blade reduces chipping of the top surface of the wafer and increases throughput by facilitating cutting and polishing in one operation. The blade can dice and polish comparatively thick wafers having narrow scribe lines in a single operation.

摘要翻译： 适用于切割半导体晶片的切割刀片具有用于抛光晶片顶表面的细砂粒边缘和用于初始切割到晶片中的粗砂粒的突出部分。 刀片减少了晶片顶表面的碎裂，并且通过在一次操作中促进切割和抛光来增加产量。 刀片可以在单次操作中骰子和抛光具有窄划线的比较厚的晶片。

公开(公告)号：US08415779B2

公开(公告)日：2013-04-09

申请号：US13047803

申请日：2011-03-15

申请人： Tzu Ling Wong ,  Chee Seng Foong ,  Kai Yun Yow

发明人： Tzu Ling Wong ,  Chee Seng Foong ,  Kai Yun Yow

IPC分类号： H01L23/495

CPC分类号： H01L23/49517 ,  H01L21/4832 ,  H01L23/49503 ,  H01L23/49551 ,  H01L23/49572 ,  H01L24/17 ,  H01L2224/16245 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00

摘要： A lead frame for providing electrical interconnection to an Integrated Circuit (IC) die. The lead frame includes a die support area for receiving and supporting the IC die and a plurality of leads surrounding the die support area. A plurality of interconnect receiving portions is formed in the die support area. The interconnect receiving portions are for providing electrical interconnection to first bumps on a bottom surface of the IC die. The leads are for providing electrical interconnection to second bumps on a surface of the IC die, the second bumps surrounding the first bumps.

摘要翻译： 用于提供与集成电路（IC）裸片的电互连的引线框架。 引线框架包括用于接收和支撑IC芯片的模具支撑区域和围绕模具支撑区域的多个引线。 在模具支撑区域中形成多个互连接收部分。 互连接收部分用于提供与IC芯片的底表面上的第一凸块的电互连。 引线用于提供与IC芯片的表面上的第二凸块的电互连，第二凸块围绕第一凸块。

公开(公告)号：US08836091B1

公开(公告)日：2014-09-16

申请号：US13794841

申请日：2013-03-12

申请人： Kai Yun Yow ,  Alexander M. Arayata ,  Jian Wen

发明人： Kai Yun Yow ,  Alexander M. Arayata ,  Jian Wen

IPC分类号： H01L23/495

CPC分类号： H01L23/49568 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49541 ,  H01L23/49565 ,  H01L24/06 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/06163 ,  H01L2224/06165 ,  H01L2224/32145 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/1461 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a lead frame, a semiconductor die, bond wires providing an electrical connection between the die and the lead frame, and a mold compound that encapsulates the lead frame, the die and the bond wires. The lead frame includes spaced apart first and second frame members each having an inner peripheral edge and an opposing outer peripheral edge, spaced apart lead pads disposed between the inner peripheral edges of the first and second frame members, and conductive leads disposed proximate to the outer peripheral edge of each of the first and second frame members. The die is mounted on the lead pads.

摘要翻译： 半导体封装包括引线框架，半导体管芯，在管芯和引线框架之间提供电连接的接合线以及封装引线框架，管芯和接合线的模具化合物。 引线框架包括间隔开的第一和第二框架构件，每个具有内周边缘和相对的外周边缘，间隔开的引线焊盘，设置在第一和第二框架构件的内周边缘之间，以及导电引线设置在靠近外部 每个第一和第二框架构件的周边边缘。 芯片安装在引线板上。