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公开(公告)号：US20250031531A1
公开(公告)日：2025-01-23
申请号：US18282106
申请日：2022-11-28
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Ying HAN , Pan XU , Xing ZHANG , Guangshuang LV , Donghui ZHAO , Chengyuan LUO , Cheng XU
IPC: H10K59/124 , G09G3/00 , G09G3/3225 , H10K59/122 , H10K59/131
Abstract: A display substrate and a display device, the display substrate includes a base substrate, a pixel driving circuit layer, a first planarization layer, a first metal layer, a second planarization layer, a plurality of first electrodes and a pixel definition layer; the pixel driving circuit layer includes a plurality of pixel driving circuits, the first planarization layer includes a plurality of first vias respectively exposing output terminals of the pixel driving circuits, the first metal layer includes a plurality of data lines extending in a first direction, the pixel definition layer includes a plurality of first definition walls extending in the first direction and a plurality of second definition walls extending in a second direction, and an orthographic projection of at least part of the data lines on the base substrate respectively overlaps with orthographic projections of the plurality of first definition walls on the base substrate.
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公开(公告)号：US20250029558A1
公开(公告)日：2025-01-23
申请号：US18281110
申请日：2022-11-30
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Xing ZHANG , Pan XU , Donghui ZHAO , Ying HAN , Chengyuan LUO , Guangshuang LV , Cheng XU , Miao LIU , Dandan ZHOU
IPC: G09G3/3233
Abstract: A driving circuit, a driving method and a display device are provided. The driving circuit includes a first control node control circuit, a second control node control circuit, a first node control circuit and a second node control circuit, wherein, the first control node control circuit is configured to control a potential of the first control node; the second control node control circuit is configured to control a potential of the second control node; the first node control circuit is configured to control a potential of the first node; the second node control circuit is electrically connected to the second control node, a first clock signal terminal and a second node respectively, and is configured to control to connect the first clock signal terminal and the second node under the control of the potential of the second control node.
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公开(公告)号：US20240179969A1
公开(公告)日：2024-05-30
申请号：US17789852
申请日：2021-06-22
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Ying HAN , Yicheng LIN , Pan XU , Guoying WANG , Xing ZHANG , Zhan GAO , Mingi CHU
IPC: H10K59/131
CPC classification number: H10K59/131
Abstract: A display panel has a display region, a fan-out region located on a side of the display region, and a bonding region located on a side of the fan-out region away from the display region. The display panel includes a gate driving circuit disposed in the display region, a plurality of data lines and a plurality of control signal lines that all extends from the display region to the fan-out region, and a plurality of data fan-out leads and a plurality of first fan-out leads that are all disposed in the fan-out region. Each data line is electrically connected to a data fan-out lead. The data fan-out leads are gathered to the bonding region. The control signal lines are electrically connected to the gate driving circuit. Each control signal line is electrically connected to a first fan-out lead. The first fan-out leads are gathered to the bonding region.
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公开(公告)号：US20230169908A1
公开(公告)日：2023-06-01
申请号：US17921585
申请日：2021-05-12
Applicant: BOE Technology Group Co., Ltd.
Inventor： Pan XU , Yicheng LIN , Guoying WANG , Xing ZHANG , Ying HAN , Zhan GAO , Dacheng ZHANG
IPC: G09G3/20
CPC classification number: G09G3/2092 , G09G2310/0267 , G09G2300/0439
Abstract: A special-shaped display panel includes: a special-shaped display area (S) having gate lines (G), some of the gate lines (G) being cut off in a non-display sub-area (S2) of the special-shaped display area (S); a first gate drive circuit set (A1) located on one side of the special-shaped display area (S), electrically connected to one ends of gate lines (G) which are not cut off by the non-display sub-area (S2), and electrically connected to gate lines (G) on one side which are cut off by the non-display sub-area (S2); and a second gate drive circuit set (A2) located on the other side of the special-shaped display area (S), electrically connected to the other ends of gate lines (G) which are not cut off by the non-display sub-area (S2), and electrically connected gate lines (G) on the other side which are cut off by the non-display sub-area (S2).
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公开(公告)号：US20230165080A1
公开(公告)日：2023-05-25
申请号：US17640230
申请日：2021-01-29
Applicant: BOE Technology Group Co., Ltd.
Inventor： Pan XU , Dacheng ZHANG , Xing ZHANG
IPC: H10K59/131 , H10K59/121
CPC classification number: H10K59/131 , H10K59/1213 , H10K59/1216
Abstract: A display substrate and a display device, include: a base substrate, which includes a display area, and a bonding area (BA) disposed on one side of the display area; a plurality of gate lines, a plurality of data lines, a plurality of lead lines, the plurality of lead lines each is respectively electrically connected with a respective one of the plurality of data lines, each of the plurality of lead lines includes a first portion extending in the second direction, and orthographic projections of at least part of the first portions on the base substrate do not overlap with orthographic projections of the data lines on the base substrate.
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Patent Agency Ranking
公开(公告)号：US20220384763A1
公开(公告)日：2022-12-01
申请号：US17761537
申请日：2021-05-20
Applicant: BOE Technology Group Co., Ltd.
Inventor： Xuefei SUN , Jaegeon YOU , Xing ZHANG , Yicheng LIN , Pan XU , Ying HAN , Guoying WANG , Zhan GAO
Abstract: The present disclosure provides a transparent display device, a simulation method, and a manufacturing method. The transparent display device includes a base substrate and a plurality of pixels arranged in an array form on the base substrate. Each pixel includes a transparent region and a display region, and a scattering structure for scattering light is arranged along a boundary between the transparent region and the display region.
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公开(公告)号：US20220254857A1
公开(公告)日：2022-08-11
申请号：US17273290
申请日：2020-05-29
Applicant: BOE Technology Group Co., Ltd.
Inventor： Pan XU , Yicheng LIN , Ling WANG , Guoying WANG , Xing ZHANG , Ying HAN
IPC: H01L27/32 , G09G3/3266 , G09G3/3233
Abstract: Provided are a display substrate and display apparatus. The display substrate includes a display region and non-display region; base substrate, driving structure layer and wiring layer. The driving structure layer located in the display region includes a first power supply line, data signal line and reference signal line extending along a first direction; the wiring layer located in the non-display region includes a first power supply wiring electrically connected to first power supply line and located on first side of the display region, a data wiring located on second side, different from the first side, of the display region, and a reference wiring located on second side of the display region. For the first power supply line, data signal line and reference signal line with the same length, resistance of first power supply line is greater than that of the data signal line and that of the reference signal line.
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公开(公告)号：US20220123083A1
公开(公告)日：2022-04-21
申请号：US17418814
申请日：2020-11-13
Applicant: BOE Technology Group Co., Ltd.
Inventor： Ying HAN , Yicheng LIN , Pan XU , Xing ZHANG , Zhan GAO , Guang YAN
Abstract: A display substrate (100), a display panel and a display apparatus. The display substrate (100) comprises a base (10), and a light-emitting device (21) and an optical compensation structure (30), which are located on the base (10), wherein the optical compensation structure (30) comprises a photoelectric sensor (31), a transistor (32) and a capacitor (33); the photoelectric sensor (31) is respectively electrically connected to the transistor (32) and the capacitor (33); the photoelectric sensor (31) comprises a first electrode (311), a photosensitive layer (312) located on a side of the first electrode (311) that is away from the base (10), and a second electrode (313) located on a side of the photosensitive layer (312) that is away from the base (10); the transistor (32) comprises a source electrode (324), a drain electrode (323), a gate electrode (322) and an active layer (321); the capacitor (33) comprises a first electrode plate (331) and a second electrode plate (332) located on a side of the first electrode plate (331) that is away from the base (10); neither of the orthographic projection of the source electrode (324) on the base (10) and the orthographic projection of the drain electrode (323) on the base (10) overlaps with the orthographic projection of the first electrode plate (331) on the base (10); and both the orthographic projection of the source electrode (324) on the base (10) and the orthographic projection of the drain electrode (323) on the base (10) overlap with the orthographic projection of the first electrode (311) on the base (10).
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公开(公告)号：US20210208502A1
公开(公告)日：2021-07-08
申请号：US16072728
申请日：2017-12-13
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Wei LI , Xing ZHANG , Dini XIE
Abstract: A photoresist composition, an organic light-emitting diode array substrate and their manufacturing methods are provided. The photoresist composition includes: an alkali soluble resin, a photosensitive monomer, a thermochromic pigment and a solvent whose mass percentages are 10-30 wt %, 1-12 wt %, 5-20 wt %, and 40-65 wt %, respectively; and the thermochromic pigment has a darkened color upon being heated.
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公开(公告)号：US20210193642A1
公开(公告)日：2021-06-24
申请号：US17253537
申请日：2020-05-15
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Pan XU , Yicheng LIN , Ling WANG , Guoying WANG , Xing ZHANG , Ying HAN , Dongfang YANG
Abstract: The present disclosure provides a display device, including: a display panel, a main circuit board, and a plurality of chip-on-films bonded between the display panel and the main circuit board. The wiring area is provided with a plurality of first binding regions; the plurality of first binding regions are distributed along the wiring area. The main circuit board is provided with a plurality of second binding regions which are corresponding to the first binding regions in a one-to-one manner. A shape of the main circuit board is the same as a shape of the wiring area. A first end of each chip-on-film is bonded to one corresponding first binding region; a second end of each chip-on-film is bonded to one corresponding second binding region.
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