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公开(公告)号：US20240049525A1
公开(公告)日：2024-02-08
申请号：US17753513
申请日：2021-03-25
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Xing ZHANG , Zhan GAO , Yicheng LIN , Pan XU , Ying HAN , Guoying WANG , Dacheng ZHANG
IPC: H10K59/126 , H10K59/38 , H10K59/131 , H10K59/80
CPC classification number: H10K59/126 , H10K59/38 , H10K59/131 , H10K59/87
Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and a light-shielding layer. The base substrate includes a display region including repeating units, each repeating unit includes a transparent region and a pixel region, the pixel region includes sub-pixels, each sub-pixel includes a sub-pixel driving circuit and a light-emitting element, and the light-emitting element includes a first electrode, a second electrode, and a light-emitting layer located between the first electrode and the second electrode. The light-shielding layer is located on a side of the sub-pixel driving circuit close to the base substrate, at least part of an orthographic projection of the light-shielding layer on a main surface of the base substrate overlaps with an orthographic projection of the sub-pixel driving circuit on the main surface of the base substrate, and the light-shielding layer is connected with the second electrode.
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公开(公告)号：US20230158769A1
公开(公告)日：2023-05-25
申请号：US17630670
申请日：2021-01-25
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Zhan GAO , Xing ZHANG , Pan XU , Wei LIU , Ying HAN , Guoying WANG , Yicheng LIN , Tangxiang WANG
CPC classification number: B32B3/08 , B32B7/027 , B32B2457/08 , B32B2457/20
Abstract: The present disclosure relates to the technical field of display, and provides a bearing substrate, a binding assembly, and a binding method thereof. The bearing substrate may be bound to an integrated substrate. A thermal expansion coefficient of the bearing substrate is greater than a thermal expansion coefficient of the integrated substrate. The integrated substrate includes a plurality of second binding terminals distributed at equal intervals in a same direction. The bearing substrate includes a plurality of first binding terminal sets distributed at equal intervals in a first direction, and each of the first binding terminal sets includes a plurality of first binding terminals distributed at equal intervals in the first direction for binding with the plurality of the second binding terminals one-to-one.
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公开(公告)号：US20230115948A1
公开(公告)日：2023-04-13
申请号：US17914929
申请日：2021-02-02
Applicant: BOE Technology Group Co., Ltd.
Inventor： Pan XU , Yongqian LI , Yicheng LIN , Ling WANG , Guoying WANG , Xing ZHANG , Ying HAN , Dacheng ZHANG , Lang LIU , Chen XU
IPC: H10K59/126 , H10K71/00
Abstract: The present disclosure provides an array substrate, a display panel, a display device and a manufacturing method, for solving the problems in the prior art that the array substrate is larger in number of circuits, the area needed for punching is larger, and the high pixel resolution cannot be achieved easily. The array substrate comprises: an interlayer dielectric layer located at the side of the active layer distant from the buffer layer, the interlayer dielectric layer being provided with a via hole, the via hole comprising a first part and a second part, the orthographic projection of the first part on the base substrate being in contact with the orthographic projection of the second part on the base substrate, the first part of the via hole penetrating through the interlayer dielectric layer and the buffer layer and exposing part of the shading layer, and the second part penetrating through the interlayer dielectric layer and exposing at least part of the active layer; and a source/drain layer located at the side of the interlayer dielectric layer distant from the active layer.
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公开(公告)号：US20220359635A1
公开(公告)日：2022-11-10
申请号：US17416522
申请日：2020-12-29
Applicant: BOE Technology Group Co., Ltd.
Inventor： Ying HAN , Ling WANG , Yicheng LIN , Pan XU , Xing ZHANG , Guoying WANG
Abstract: Provided is a display substrate, including: a substrate, and multiple light-emitting units and multiple light-detecting units located on a substrate. At least one light-emitting unit includes a light-emitting element and a pixel driving circuit coupled with the light-emitting element, and at least one light-detecting unit includes an optical sensing element and a light-emitting detection circuit coupled with an optical sensing element; an optical sensing element is located on one side of a light-emitting detection circuit and a pixel driving circuit away from a substrate and between a light-emitting element and a substrate; the light-emitting element emits light from a side away from the substrate, and a light transmittance region is provided on one side of the light-emitting element facing the optical sensing element.
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公开(公告)号：US20220102460A1
公开(公告)日：2022-03-31
申请号：US17298032
申请日：2020-10-28
Applicant: BOE Technology Group Co., Ltd.
Inventor： Pan XU , Yicheng LIN , Ling WANG , Guoying WANG , Xing ZHANG , Ying HAN
Abstract: A display substrate and a manufacturing method therefor, and a display device. The display substrate includes multiple sub-pixels, each sub-pixel including a light-emitting region and a non-light-emitting region, and a driving circuit being provided in each sub-pixel. The driving circuit includes a storage capacitor and multiple transistors. The transistors include a switching transistor, a driving transistor, and a sensing transistor. For each sub-pixel, the transistors are located in the non-light-emitting region, the storage capacitor is a transparent capacitor, and the orthographic projection of the storage capacitor on a substrate overlaps the light-emitting region. The first electrode of the storage capacitor is arranged on the same layer as the active layer of the transistors, and arranged on a different layer from the source and drain electrodes of the transistors, and the second electrode of the storage capacitor is located on the side of the first electrode close to the substrate.
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Patent Agency Ranking
公开(公告)号：US20210391402A1
公开(公告)日：2021-12-16
申请号：US17288571
申请日：2020-08-03
Applicant: BOE Technology Group Co., Ltd.
Inventor： Zhen SONG , Guoying WANG
IPC: H01L27/32
Abstract: A display substrate, includes a plurality of subpixels arranged in a matrix. Each subpixel is provided with a pixel driver circuit that includes a plurality of thin film transistors and a storage capacitor. The storage capacitor of a present subpixel among the plurality of subpixels and the storage capacitor of an adjacent subpixel adjacent to the current subpixel are disposed in a shared capacitance region of the present subpixel and the adjacent subpixel, and the storage capacitor of the present subpixel and the storage capacitor of the adjacent subpixel are stacked.
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公开(公告)号：US20210135147A1
公开(公告)日：2021-05-06
申请号：US16640047
申请日：2019-09-11
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Guoying WANG , Zhen SONG
Abstract: A display panel is provided, the display panel including a back plate, a cover plate, a first spacer, and a second spacer, wherein the back plate has a first surface, the cover plate is disposed opposite the back plate and has a second surface opposite the first surface, the first spacer protrudes from an edge of the first surface and has a closed structure, a first connecting end, and a first free end, the first connecting end connected to the back plate, and the first free end extending away from the back plate, the second spacer protrudes from an edge of the second surface and has a closed structure, a second connecting end, and a second free end, the second connecting end connected to the cover plate, and the second free end extending away from the cover plate, and the first free end presses against the second free end.
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公开(公告)号：US20200044000A1
公开(公告)日：2020-02-06
申请号：US16429265
申请日：2019-06-03
Applicant: BOE Technology Group Co., Ltd.
Inventor： Zhen SONG , Guoying WANG , Jiangbo CHEN
Abstract: The disclosure discloses a display substrate, a method for fabricating the same, and a display device. The display substrate includes: a light-shielding metal layer pattern on a base substrate; a photo-sensitive sensing element layer on the light-shielding metal layer pattern, wherein an orthographic projection of the photo-sensitive sensing element layer onto the base substrate lies in an overlapping area of orthographic projections of the light-shielding metal layer pattern and the sub-pixel areas onto the base substrate; a buffer layer on the photo-sensitive sensing element layer; and a compensation control TFT and a signal line on the buffer layer, wherein a source electrode of the compensation control TFT is electrically connected with the light-shielding metal layer pattern, and the signal line is electrically connected with the photo-sensitive sensing element layer.
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公开(公告)号：US20200027938A1
公开(公告)日：2020-01-23
申请号：US16338125
申请日：2018-07-26
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Zhen SONG , Guoying WANG
IPC: H01L27/32
Abstract: A pixel circuit includes a substrate, and a first thin film transistor and a second transistor which are disposed on the substrate. The first thin film transistor is in a top-gate structure, and the second thin film transistor is in a bottom-gate structure; a first electrode of the first thin film transistor is electrically connected with a gate electrode of the second thin film transistor, and the first electrode of the first thin film transistor and the gate electrode of the second thin film transistor are in a same layer on the substrate. The pixel circuit can have a relatively high switch speed and a relatively large driving current, a manufacturing method is easily realized and a process cost is relatively low.
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公开(公告)号：US20190280018A1
公开(公告)日：2019-09-12
申请号：US16061078
申请日：2017-10-26
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Zhen SONG , Guoying WANG , Fengjuan LIU
IPC: H01L27/12 , H01L29/786
Abstract: An array substrate, a manufacturing method thereof and a display device are provided. The manufacturing method includes: forming a light-shielding pattern layer, a buffer layer, an active layer, a gate insulating layer and a gate electrode on a base substrate, which are away from the base substrate in sequence; depositing an amorphous silicon (a-Si) film on the base substrate in a temperature range of 15-150° C.; forming a first interlayer dielectric (ILD) at least disposed above the active layer by patterning the a-Si film; forming through holes in the first ILD, through which a source contact region and a drain contact region of the active layer are exposed; and forming a source electrode and a drain electrode on the first ILD, which are respectively connected with the source contact region and the drain contact region via the through holes.
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