公开(公告)号：US20220406245A1

公开(公告)日：2022-12-22

申请号：US17642025

申请日：2021-04-08

Applicant: BOE Technology Group Co., Ltd.

Inventor： Hao CHEN ,  Zhenyu ZHANG ,  Jiao ZHAO ,  Li XIAO ,  Dongni LIU ,  Haoliang ZHENG ,  Liang CHEN ,  Minghua XUAN ,  Ming YANG ,  Xinhong LU ,  Qi QI

IPC: G09G3/32 ,  H01L25/075 ,  H01L27/12 ,  H01L33/62 ,  G09G3/00 ,  G01R31/52 ,  G01R31/54

Abstract: An array substrate, a detection method for the array substrate, and a tiled display panel. In the array substrate, each of pixels (1) comprises sub-pixels (01) of at least three colors and a. pixel driving chip (02) for driving each sub-pixel (01) to emit light; each sub-pixel (01) comprises at least one inorganic light-emitting diode; a display area (A1) further comprises: a positive signal line (Tian) connected to a positive electrode of each inorganic light-emitting diode, and a data signal line (Din), a scanning line (Sn), and a reference signal line (Vm) connected to each pixel driving chip (02); each pixel driving chip (02) is used for writing signals of the data signal line (Dm) into the sub-pixels (01) of different colors under the control of the corresponding scanning line (Sn) in a time division manner.

公开(公告)号：US20220335889A1

公开(公告)日：2022-10-20

申请号：US17760733

申请日：2021-03-18

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Haoliang ZHENG ,  Minghua XUAN ,  Dongni LIU ,  Zhenyu ZHANG ,  Li XIAO ,  Liang CHEN ,  Hao CHEN ,  Jiao ZHAO ,  Lijun YUAN ,  Yi OUYANG ,  Qi QI

IPC: G09G3/3233 ,  G11C19/28

Abstract: A shift register (SR) includes a voltage control circuit (110) and a bias compensation circuit (120). The voltage control circuit (110) is configured to control a voltage at a first node (Output) to be a first voltage or a second voltage. The bias compensation circuit (120) is configured to: when the voltage at the first node (Output) is the first voltage, transmit a first signal received by a first signal terminal (VDD-A) to a first signal output terminal (EM1), and transmit a second signal received by a second signal terminal (VDD-B) to a second signal output terminal (EM2); and in response to the voltage at the first node (Output) being the second voltage, transmit a signal received by a first voltage terminal (LVGL1) to the first signal output terminal (EM1) and the second signal output terminal (EM2).

公开(公告)号：US20220293037A1

公开(公告)日：2022-09-15

申请号：US17511335

申请日：2021-10-26

Applicant: BOE Technology Group Co., Ltd.

Inventor： Haoliang ZHENG ,  Minghua XUAN ,  Dongni LIU ,  SeungWoo HAN ,  Li XIAO ,  Liang CHEN ,  Hao CHEN ,  Jiao ZHAO ,  Qi QI

IPC: G09G3/32

Abstract: Disclosed is an array substrate including multiple first selection circuits with each including at least two first selection transistors and at least two first anticreeping transistors. Each first selection transistor is connected with one first anticreeping transistor in series. When the first selection transistor is turned on by a first turn-on signal from a first control signal terminal, the first anticreeping transistor is turned on by a second turn-on signal from a second control signal terminal. When the first selection transistor is turned off by a first turn-off signal from the first control signal terminal, the first anticreeping transistor is turned off to make the first selection transistors and the data signal terminal disconnected, by a second turn-off signal from the second control signal terminal. A voltage of the first turn-off signal is greater than a voltage of the second turn-off signal.

公开(公告)号：US20210193027A1

公开(公告)日：2021-06-24

申请号：US17086097

申请日：2020-10-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Haoliang ZHENG ,  Dongni LIU ,  Minghua XUAN ,  Zhenyu ZHANG ,  Li XIAO ,  Liang CHEN ,  Hao CHEN ,  Guangliang SHANG ,  Lijun YUAN ,  Xing YAO

IPC: G09G3/32

Abstract: A shift register includes an input sub-circuit, a control sub-circuit, an output sub-circuit and a reset sub-circuit. The input sub-circuit is configured to transmit an input signal from an input signal terminal to a pull-up node. The control sub-circuit is configured to transmit a clock signal from a clock signal terminal to the control node. The output sub-circuit is configured to transmit a second voltage signal from a second voltage signal terminal to a first output signal terminal, and to transmit a first voltage signal from a first voltage signal terminal to the first output signal terminal. The reset sub-circuit is configured to transmit the second voltage signal to the control node to reset the control node, and to transmit a third voltage signal from the third voltage signal terminal to the pull-up node to reset the pull-up node.

公开(公告)号：US20180307182A1

公开(公告)日：2018-10-25

申请号：US15956234

申请日：2018-04-18

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Hao CHEN

IPC: G03H1/22 ,  G03H1/12

CPC classification number: G03H1/2294 ,  G03H1/0808 ,  G03H1/12 ,  G03H1/2286 ,  G03H1/265 ,  G03H2001/0212 ,  G03H2222/34

Abstract: A holographic display device is provided, comprising a spatial light modulator. The spatial light modulator is configured to load at least one composite hologram, and one of the at least one composite hologram is formed by superposing N sub-holograms. The holographic display device further comprises a light source arranged on a light incoming side of the spatial light modulator. The light source is configured to provide readout light to the spatial light modulator. The light source comprises M light source components. The direction of propagation of emergent light of each of at least two light source components among the M light source components is identical to the direction of propagation of a reference wave corresponding to one of the N sub-holograms, wherein M≥N≥2, and M and N are positive integers.

公开(公告)号：US20180267468A1

公开(公告)日：2018-09-20

申请号：US15921599

申请日：2018-03-14

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Hao CHEN ,  Wei WEI

IPC: G03H1/22 ,  G03H1/00

Abstract: The present disclosure relates to the field of display technology and provides an addressing method of a spatial light modulator, a holographic display device and a control method thereof, which can simplify the addressing process of the spatial light modulator. The addressing method of the spatial light modulator comprises the steps of: dividing the spatial light modulator to obtain one or more modulation regions, each modulation region comprising M loading subregions, and each loading subregion comprising at least one pixel unit, wherein M≥12, and M is a positive integer; and addressing one loading subregion of each modulation region within a frame so as to load holographic data of a frame of a hologram to all the pixel units of all the addressed loading subregions.

公开(公告)号：US20180107032A1

公开(公告)日：2018-04-19

申请号：US15541781

申请日：2016-09-27

Applicant: BOE TECHNOLOGY GROUP CO., LTD. ,  HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.

Inventor： Zhuang Liu ,  Baogui CAO ,  Hao CHEN ,  Min YOU ,  Guanghua HU ,  Rei REN ,  Yadong LIU ,  Yinchu ZHAO

IPC: G02F1/13 ,  G02F1/1333 ,  B32B37/12 ,  B65G49/06 ,  B32B37/10

CPC classification number: G02F1/1303 ,  B32B37/1018 ,  B32B37/12 ,  B32B2037/1253 ,  B65G49/068 ,  G02F1/13338

Abstract: A bonding apparatus and a bonding method, the bonding apparatus includes at least one first bonding device, at least two second bonding devices and a transferring device. The first bonding device is configured to visually align and bond an optically clear adhesive and a first component, to form a first bonding component. The transferring device is configured to transfer the first bonding component to the second bonding device. The second bonding device is configured to visually align and bond the first bonding component and a second component, to form a second bonding component.

公开(公告)号：US20240395197A1

公开(公告)日：2024-11-28

申请号：US17772029

申请日：2021-06-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seungwoo HAN ,  Haoliang ZHENG ,  Li XIAO ,  Dongni LIU ,  Liang CHEN ,  Hao CHEN ,  Jiao ZHAO ,  Minghua XUAN

IPC: G09G3/3233 ,  G09G3/20

Abstract: A pixel circuit includes a first driving circuit, a first control circuit, a second driving circuit and a second control circuit. The first driving circuit is configured to write a first data signal into a first node in response to a scanning signal. The first control circuit is configured to transmit a first voltage signal to the first driving circuit, and transmit a first driving signal generated by the first driving circuit according to a voltage of the first node and the first voltage signal in response to an enable signal. The second driving circuit is configured to write a second data signal into a second node in response to the scanning signal. The second control circuit is configured to transmit a second driving signal generated by the second driving circuit according to a voltage of the second node and the first voltage signal in response to a control signal.

公开(公告)号：US20240321186A1

公开(公告)日：2024-09-26

申请号：US18680595

申请日：2024-05-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jiao ZHAO ,  Li XIAO ,  Minghua XUAN ,  Haoliang ZHENG ,  Dongni LIU ,  Jing LIU ,  Qi QI ,  Zhenyu ZHANG ,  Liang CHEN ,  Hao CHEN ,  Lijun YUAN

IPC: G09G3/32 ,  G11C19/28 ,  H01L25/075 ,  H01L27/02 ,  H01L27/12 ,  H01L33/62

CPC classification number: G09G3/32 ,  G11C19/28 ,  H01L25/0753 ,  H01L27/0296 ,  H01L27/124 ,  H01L33/62 ,  G09G2300/026 ,  G09G2310/0286 ,  G09G2330/04

Abstract: An array substrate has a display area and includes at least one pixel group, at least one pixel circuit group and at least one shift register circuit. The at least one pixel group is disposed in the display area. Each pixel group includes a plurality of pixels arranged in an array. Each pixel circuit group is disposed between two adjacent rows of pixels or two adjacent columns of pixels in a corresponding pixel group. Each pixel circuit group includes at least one pixel driving sub-circuit group. A shift register circuit is disposed between two rows of pixels or two columns of pixels that are different from two rows of pixels or two columns of pixels between which a pixel driving sub-circuit group is disposed.

公开(公告)号：US20240185772A1

公开(公告)日：2024-06-06

申请号：US18533211

申请日：2023-12-08

Applicant: BOE Technology Group Co., Ltd.

Inventor： Li XIAO ,  Haoliang ZHENG ,  Minghua XUAN ,  Seungwoo HAN ,  Hao CHEN ,  Dongni LIU ,  Jiao ZHAO ,  Liang CHEN ,  Qi QI

IPC: G09G3/32 ,  G09G3/20

CPC classification number: G09G3/32 ,  G09G3/2007 ,  G09G3/3208

Abstract: A drive method for a display panel, wherein the display panel includes a plurality of current data lines, a plurality of time-length data lines, a first current selection signal line, a second current selection signal line, a first time-length selection signal line and a second time-length selection signal line, at least one current data line is connected with the first current selection signal line or the second current selection signal line, and at least one time-length data line is connected with the first time-length selection signal line or the second time-length selection signal line; the method includes: providing a valid level signal to the first time-length selection signal line, the second time-length selection signal line, the first current selection signal line and the second current selection signal line.