公开(公告)号：US20220335889A1

公开(公告)日：2022-10-20

申请号：US17760733

申请日：2021-03-18

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Haoliang ZHENG ,  Minghua XUAN ,  Dongni LIU ,  Zhenyu ZHANG ,  Li XIAO ,  Liang CHEN ,  Hao CHEN ,  Jiao ZHAO ,  Lijun YUAN ,  Yi OUYANG ,  Qi QI

IPC: G09G3/3233 ,  G11C19/28

Abstract: A shift register (SR) includes a voltage control circuit (110) and a bias compensation circuit (120). The voltage control circuit (110) is configured to control a voltage at a first node (Output) to be a first voltage or a second voltage. The bias compensation circuit (120) is configured to: when the voltage at the first node (Output) is the first voltage, transmit a first signal received by a first signal terminal (VDD-A) to a first signal output terminal (EM1), and transmit a second signal received by a second signal terminal (VDD-B) to a second signal output terminal (EM2); and in response to the voltage at the first node (Output) being the second voltage, transmit a signal received by a first voltage terminal (LVGL1) to the first signal output terminal (EM1) and the second signal output terminal (EM2).

公开(公告)号：US20220157223A1

公开(公告)日：2022-05-19

申请号：US17355637

申请日：2021-06-23

Applicant: BOE Technology Group Co., Ltd.

Inventor： Zhichong WANG ,  Xinglong LUAN ,  Peng LIU ,  Jing FENG ,  Gaoming SUN ,  Yi OUYANG

IPC: G09G3/32

Abstract: The present application discloses a pixel circuit and a driving method thereof, and a display device. The circuit includes: a first initialization sub-circuit, a data writing circuit, a light emitting control circuit, a capacitor circuit, a drive transistor, a compensation circuit, a light emitting element, and a holding circuit; the first initialization sub-circuit is connected to a second terminal of the capacitor circuit and a gate of the drive transistor; the data writing circuit and the holding circuit are connected to a first terminal of the capacitor circuit; the light emitting control circuit is connected to a first electrode of the light emitting element and a second electrode of the drive transistor; a first electrode of the drive transistor is connected to the first power supply; a second electrode of the light emitting element is connected to a second power supply.

公开(公告)号：US20220093024A1

公开(公告)日：2022-03-24

申请号：US17327056

申请日：2021-05-21

Applicant: BOE Technology Group Co., Ltd.

Inventor： Haoliang ZHENG ,  Seungwoo HAN ,  Yi OUYANG ,  Minghua XUAN

IPC: G09G3/20 ,  G09G3/00 ,  G11C19/28

Abstract: The present disclosure provides a shift register unit and a driving method thereof, a gate driving circuit and a driving method thereof, and a display device. The shift register unit includes: a first shift register, a second shift register and a switch control circuit, signal input terminals of the first and second shift registers are coupled to a cascade signal input terminal through the switch control circuit, the switch control circuit is configured to allow a current between the signal input terminal of the first shift register and the cascade signal input terminal or not, and allow a current between the signal input terminal of the second shift register and the cascade signal input terminal or not; the first shift register and the second shift register are configured such that at least one of them operates upon receiving a cascade signal provided by the cascade signal input terminal.

公开(公告)号：US20210027699A1

公开(公告)日：2021-01-28

申请号：US16904585

申请日：2020-06-18

Applicant: BOE Technology Group Co., Ltd.

Inventor： Haoliang ZHENG ,  Minghua XUAN ,  Dongni LIU ,  Ning CONG ,  Zhenyu ZHANG ,  Lijun YUAN ,  Yi OUYANG ,  Guangliang SHANG

IPC: G09G3/32

Abstract: Disclosed are a display panel and a display device. The display panel includes M rows and N columns of pixel units. The display panel is divided into R regions along a column direction, and an i-th region includes: (1+M(i−1)/R)-th row to a (Mi/R)-th row of pixel units. The display panel further includes M shift registers, M light emitting drivers, R light emitting control scan staring signal terminals, R scan start signal terminals for controlling time length and R scan start signal terminals for controlling current. An i-th row of pixel units is connected with an i-th shift register and an i-th light emitting driver, a light emitting driver connected to a first row of pixel units in the i-th region is connected with an i-th scan start signal terminal for controlling light emission.