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公开(公告)号:US20240312411A1
公开(公告)日:2024-09-19
申请号:US18665611
申请日:2024-05-16
发明人: Yunsik IM , Shunhang ZHANG , Zhenyu ZHANG , Zhen ZHANG , Peirou LI , Dongni LIU , Lianfu YU
IPC分类号: G09G3/3233 , G09G3/20
CPC分类号: G09G3/3233 , G09G3/2007 , G09G2300/0819 , G09G2300/0852 , G09G2300/0861 , G09G2310/08
摘要: A pixel drive circuit is configured to drive a light emitting device to emit light, the light emitting device includes a first electrode and a second electrode, the pixel drive circuit includes a current control sub-circuit and a duration control sub-circuit; the duration control sub-circuit is configured to provide control signal to a first node under control of signals of a first scan signal line, a first reset signal line, a first light emitting signal line, control signal line, a data signal line, an initial signal line, and a first power supply line; the current control sub-circuit is configured to provide a drive current to a first electrode of a light emitting device under control of signals of a first node, a second scan signal line, a second reset signal line, a second light emitting signal line, a Data signal line, and a second power supply line.
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公开(公告)号:US20230215333A1
公开(公告)日:2023-07-06
申请号:US18181625
申请日:2023-03-10
发明人: Zuquan HU , Zhenyu ZHANG , Haipeng YANG , Ke DAI
IPC分类号: G09G3/20
CPC分类号: G09G3/2092 , G09G2300/0426 , G09G2310/0286 , G09G2310/061 , G09G2310/08 , G09G3/3266
摘要: A display device, a gate drive circuit, a shift register and a control method are disclosed. The shift register includes a first shift register unit and a second shift register unit, the first shift register unit is configured to write a first control signal to the first node, and write a first clock signal to the first signal output terminal under control of a voltage of the first node; the second shift register unit is configured to write a second clock signal to the second signal output terminal under control of the voltage of the first node; during time of a frame, the first clock signal and a first input signal provided by a first signal input terminal are pulse signals, and the second clock signal is a DC signal.
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公开(公告)号:US20220406245A1
公开(公告)日:2022-12-22
申请号:US17642025
申请日:2021-04-08
发明人: Hao CHEN , Zhenyu ZHANG , Jiao ZHAO , Li XIAO , Dongni LIU , Haoliang ZHENG , Liang CHEN , Minghua XUAN , Ming YANG , Xinhong LU , Qi QI
摘要: An array substrate, a detection method for the array substrate, and a tiled display panel. In the array substrate, each of pixels (1) comprises sub-pixels (01) of at least three colors and a. pixel driving chip (02) for driving each sub-pixel (01) to emit light; each sub-pixel (01) comprises at least one inorganic light-emitting diode; a display area (A1) further comprises: a positive signal line (Tian) connected to a positive electrode of each inorganic light-emitting diode, and a data signal line (Din), a scanning line (Sn), and a reference signal line (Vm) connected to each pixel driving chip (02); each pixel driving chip (02) is used for writing signals of the data signal line (Dm) into the sub-pixels (01) of different colors under the control of the corresponding scanning line (Sn) in a time division manner.
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公开(公告)号:US20220335889A1
公开(公告)日:2022-10-20
申请号:US17760733
申请日:2021-03-18
发明人: Haoliang ZHENG , Minghua XUAN , Dongni LIU , Zhenyu ZHANG , Li XIAO , Liang CHEN , Hao CHEN , Jiao ZHAO , Lijun YUAN , Yi OUYANG , Qi QI
IPC分类号: G09G3/3233 , G11C19/28
摘要: A shift register (SR) includes a voltage control circuit (110) and a bias compensation circuit (120). The voltage control circuit (110) is configured to control a voltage at a first node (Output) to be a first voltage or a second voltage. The bias compensation circuit (120) is configured to: when the voltage at the first node (Output) is the first voltage, transmit a first signal received by a first signal terminal (VDD-A) to a first signal output terminal (EM1), and transmit a second signal received by a second signal terminal (VDD-B) to a second signal output terminal (EM2); and in response to the voltage at the first node (Output) being the second voltage, transmit a signal received by a first voltage terminal (LVGL1) to the first signal output terminal (EM1) and the second signal output terminal (EM2).
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5.
公开(公告)号:US20210193027A1
公开(公告)日:2021-06-24
申请号:US17086097
申请日:2020-10-30
发明人: Haoliang ZHENG , Dongni LIU , Minghua XUAN , Zhenyu ZHANG , Li XIAO , Liang CHEN , Hao CHEN , Guangliang SHANG , Lijun YUAN , Xing YAO
IPC分类号: G09G3/32
摘要: A shift register includes an input sub-circuit, a control sub-circuit, an output sub-circuit and a reset sub-circuit. The input sub-circuit is configured to transmit an input signal from an input signal terminal to a pull-up node. The control sub-circuit is configured to transmit a clock signal from a clock signal terminal to the control node. The output sub-circuit is configured to transmit a second voltage signal from a second voltage signal terminal to a first output signal terminal, and to transmit a first voltage signal from a first voltage signal terminal to the first output signal terminal. The reset sub-circuit is configured to transmit the second voltage signal to the control node to reset the control node, and to transmit a third voltage signal from the third voltage signal terminal to the pull-up node to reset the pull-up node.
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6.
公开(公告)号:US20200219428A1
公开(公告)日:2020-07-09
申请号:US16515880
申请日:2019-07-18
发明人: Lijun YUAN , Xing YAO , Guangliang SHANG , Haoliang ZHENG , Zhenyu ZHANG
摘要: A shift register circuit according to an embodiment of the present disclosure includes an input sub-circuit and N-stage output sub-circuits. The input sub-circuit is configured to transmit an input signal to a pull up node at a first stage. The output sub-circuit at each stage is configured to transmit a clock signal from a clock signal terminal at a same stage to an output signal terminal at the same stage under the control of a pull-up node at the same stage. The output sub-circuit at each stage is further configured to transmit a signal transmitted to an output signal terminal at the same stage to a pull-up node at an immediately subsequent stage under the control of a shift control signal from a shift control signal terminal at the same stage.
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7.
公开(公告)号:US20190122624A1
公开(公告)日:2019-04-25
申请号:US16049128
申请日:2018-07-30
发明人: Zhenyu ZHANG , Fangyu WANG , Dongchuan CHEN
IPC分类号: G09G3/36 , G02F1/133 , G02F1/1362 , G02F1/1368
CPC分类号: G09G3/3648 , G02F1/13318 , G02F1/136213 , G02F1/136286 , G02F1/1368 , G02F2201/121 , G09G2320/0626 , G09G2320/066 , G09G2360/145
摘要: A pixel unit and a driving method thereof, a liquid crystal panel and a display device are provided. The pixel unit includes a pixel electrode, a control circuit, a light sensing circuit, a data line and a gate line. A control end of the control circuit is connected to the gate line, a first end of the control circuit is connected to the date line, a second end of the control circuit is connected to a first end of the light sensing circuit, and a second end of the light sensing circuit is connected to the pixel electrode. The control circuit is configured to control, under control of the gate line, the data line to be connected to the first end of the light sensing circuit.
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公开(公告)号:US20240203343A1
公开(公告)日:2024-06-20
申请号:US17794625
申请日:2021-09-23
发明人: Yuzhen GUO , Zhenyu ZHANG , Lubin SHI , Zhen ZHANG , Chenyang ZHANG , Fuqiang LI
IPC分类号: G09G3/3233 , G09G3/3266 , H10K59/131
CPC分类号: G09G3/3233 , G09G3/3266 , H10K59/131 , G09G2300/0408 , G09G2300/0426 , G09G2300/0452 , G09G2300/0819 , G09G2300/0842 , G09G2310/0286 , G09G2310/08
摘要: Disclosed are a display substrate and a display apparatus, the display substrate includes a display region and a non-display region, the display region is provided with a pixel circuit and a light emitting unit; each pixel circuit is connected with K light emitting devices emitting light of a same color; each pixel circuit includes a current control sub-circuit and a light emitting selection sub-circuit; the current control sub-circuit is configured to provide a drive current to a first node under control of a reset signal terminal, an initial signal terminal, a scan signal terminal, a data signal terminal, a light emitting control terminal, and a first power supply terminal; the light emitting selection sub-circuit is configured to sequentially provide a signal of the first node to the K light emitting devices emitting light of the same color under control of K light emitting selection signal terminals.
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公开(公告)号:US20220327988A1
公开(公告)日:2022-10-13
申请号:US17809234
申请日:2022-06-27
发明人: Zuquan HU , Zhenyu ZHANG , Haipeng YANG , Ke DAI
IPC分类号: G09G3/20
摘要: A display device, a gate drive circuit, a shift register and a control method are disclosed. The shift register includes a first shift register unit and a second shift register unit, the first shift register unit is configured to write a first control signal to the first node, and write a first clock signal to the first signal output terminal under control of a voltage of the first node; the second shift register unit is configured to write a second clock signal to the second signal output terminal under control of the voltage of the first node; during time of a frame, the first clock signal and a first input signal provided by a first signal input terminal are pulse signals, and the second clock signal is a DC signal.
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公开(公告)号:US20210375702A1
公开(公告)日:2021-12-02
申请号:US17253960
申请日:2019-11-29
发明人: Li XIAO , Dongni LIU , Minghua XUAN , Jiao ZHAO , Haoliang ZHENG , Zhenyu ZHANG , Liang CHEN , Hao CHEN , Jing LIU , Qi QI
摘要: The present application provides a method for detecting a broken fanout wire of a display substrate, and a display substrate, and belongs to the field of display technology. In the method for detecting a broken fanout wire, the display substrate includes a base substrate having first and second surfaces opposite to each other, and a plurality of connection structures disposed at intervals on the first surface; and each connection structure includes first and second pads and a fanout wire electrically connecting the first pad to the second pad. The method for detecting a broken fanout wire includes: forming at least one detection unit, which includes: connecting at least two connection structures in series through a connecting part; and measuring a head and an end of the detection unit to obtain resistance of the detection unit, and determining whether there is a broken fanout wire in the detection unit.
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