公开(公告)号：US09912349B1

公开(公告)日：2018-03-06

申请号：US15628455

申请日：2017-06-20

Applicant: BEIJING BAIDU NETCOM SCIENCE AND TECHNOLOGY CO., LTD.

Inventor： Jian Ouyang ,  Ni Zhou ,  Yong Wang ,  Wei Qi

IPC: H03M7/30 ,  G06F17/16 ,  G06N3/02 ,  G06F9/30 ,  G06F9/38 ,  G06T15/00

CPC classification number: H03M7/30 ,  G06F9/30018 ,  G06F9/30145 ,  G06F9/30149 ,  G06F9/30174 ,  G06F9/3851 ,  G06F17/16 ,  G06N3/02 ,  G06T15/005 ,  H03M7/24

Abstract: The present disclosure provides a method and apparatus for processing a floating point number matrix, an apparatus and a computer readable storage medium. In embodiments of the present disclosure, the minimum value of the floating point number model matrix and the maximum value of the floating point number model matrix are obtained according to a floating point number model matrix to be compressed, and then, compression processing is performed for the floating point number model matrix to obtain the fixed point number model matrix according to the bit width, the minimum value of the floating point number model matrix and the maximum value of the floating point number model matrix. The compression processing is performed for the floating point number model matrix of the deep learning model by a fixed point method, to obtain the fixed point number model matrix and reduce the storage space and amount of operation of the deep learning model. Meanwhile, the present disclosure proposes a framework for implementing the apparatus in the deep learning network to maximize the deep learning network precision, that is, a multiplication portion of the matrix uses the apparatus, and operations of other portions such as activation function retain the floating point operation.

公开(公告)号：US20180052685A1

公开(公告)日：2018-02-22

申请号：US15360245

申请日：2016-11-23

Applicant: BEIJING BAIDU NETCOM SCIENCE AND TECHNOLOGY CO., LTD.

Inventor： Jian Ouyang ,  Wei Qi ,  Yong Wang

IPC: G06F9/30 ,  G06F9/38

CPC classification number: G06F9/3016 ,  G06F9/3001 ,  G06F9/3004 ,  G06F9/3802 ,  G06F9/3824 ,  G06F9/3877

Abstract: The present application discloses a processor and a method for executing an instruction on a processor. The method includes: fetching a to-be-executed instruction, the instruction comprising a source address field, a destination address field, an operation type field, and an operation parameter field; determining, in at least one execution unit, an execution unit controlled by a to-be-generated control signal according to the operation type field, determining a source address and a destination address of data operated by the execution unit controlled by the to-be-generated control signal according to the source address field and the destination address field, and determining a data amount of the data operated by the execution unit controlled by the to-be-generated control signal according to the operation parameter field; generating the control signal; and controlling, by using the control signal, the execution unit in the at least one execution unit to execute an operation.

公开(公告)号：US20170365306A1

公开(公告)日：2017-12-21

申请号：US15281283

申请日：2016-09-30

Applicant: BEIJING BAIDU NETCOM SCIENCE AND TECHNOLOGY CO., LTD.

Inventor： Jian Ouyang ,  Wei Qi ,  Yong Wang

IPC: G11C7/10 ,  G11C29/50 ,  G06F9/30 ,  G11C11/41

CPC classification number: G11C7/1072 ,  G06F9/30025 ,  G06N3/0481 ,  G11C7/1006 ,  G11C7/1036 ,  G11C11/41 ,  G11C29/50004 ,  G11C2029/5004

Abstract: The present application discloses a data processing method and apparatus. A specific embodiment of the method includes: preprocessing received to-be-processed input data; obtaining a storage address of configuration parameters of the to-be-processed input data based on a result of the preprocessing and a result obtained by linearly fitting an activation function, the configuration parameters being preset according to curve characteristics of the activation function; acquiring the configuration parameters of the to-be-processed input data according to the storage address; and processing the result of the preprocessing of the to-be-processed input data based on the configuration parameters of the to-be-processed input data and a preset circuit structure, to obtain a processing result. This implementation manner implements the processing of the input data to be processed by using the configuration parameter and the preset circuit structure, without the need to use any special circuit for implementing the activation function, thereby simplifying the circuit structure. In addition, this implementation manner can support multiple types of activation functions, thereby improving the flexibility. With such an embodiment, the processing of the input data to be processed can be realized by using the configuration parameters and the preset circuit structure, without the need of using a special circuit to implement the activation function, thereby simplifying the circuit structure, supporting various activation functions, and improving the flexibility.