公开(公告)号：US20170098555A1

公开(公告)日：2017-04-06

申请号：US15268158

申请日：2016-09-16

申请人： Applied Materials, Inc.

发明人： Roman GOUK ,  Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Jean DELMAS

IPC分类号： H01L21/67 ,  F26B21/14 ,  H01L21/677 ,  B08B7/00 ,  H01L21/02 ,  H01L21/687

CPC分类号： H01L21/67034 ,  B08B7/0021 ,  B08B7/0035 ,  C11D11/0047 ,  F26B21/14 ,  H01L21/02101 ,  H01L21/6704 ,  H01L21/67126 ,  H01L21/6719 ,  H01L21/67739 ,  H01L21/67748 ,  H01L21/68792

摘要： Embodiments described herein generally relate to a processing chamber incorporating a small thermal mass which enable efficient temperature cycling for supercritical drying processes. The chamber generally includes a body, a liner, and an insulation element which enables the liner to exhibit a small thermal mass relative to the body. The chamber is also configured with suitable apparatus for generating and/or maintaining supercritical fluid within a processing volume of the chamber.

公开(公告)号：US20140231384A1

公开(公告)日：2014-08-21

申请号：US14177893

申请日：2014-02-11

申请人： APPLIED MATERIALS, INC.

发明人： Brian Saxton UNDERWOOD ,  Abhijit Basu MALLICK ,  Nitin INGLE ,  Roman GOUK ,  Steven VERHAVERBEKE

IPC分类号： G11B5/85

CPC分类号： G11B5/85 ,  G11B5/855

摘要： Method and apparatus for forming a patterned magnetic substrate are provided. A patterned resist is formed on a magnetically active surface of a substrate. An oxide layer is formed over the patterned resist by a flowable CVD process. The oxide layer is etched to expose portions of the patterned resist. The patterned resist is then etched, using the etched oxide layer as a mask, to expose portions of the magnetically active surface. A magnetic property of the exposed portions of the magnetically active surface is then modified by directing energy through the etched resist layer and the etched oxide layer, which are subsequently removed from the substrate.

摘要翻译： 提供了用于形成图案化磁性基底的方法和装置。 在基板的磁性活性表面上形成图案化的抗蚀剂。 通过可流动的CVD工艺在图案化的抗蚀剂上形成氧化物层。 蚀刻氧化物层以暴露图案化抗蚀剂的部分。 然后使用蚀刻的氧化物层作为掩模蚀刻图案化的抗蚀剂，以暴露磁性活性表面的部分。 然后通过将能量引导通过经蚀刻的抗蚀剂层和经蚀刻的氧化物层（随后从衬底去除）来改变磁性活性表面的暴露部分的磁性。

公开(公告)号：US20240021582A1

公开(公告)日：2024-01-18

申请号：US18360749

申请日：2023-07-27

申请人： Applied Materials, Inc.

发明人： Kurtis LESCHKIES ,  Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Giback PARK ,  Kyuil CHO ,  Jeffrey L. FRANKLIN ,  Wei-Sheng LEI

IPC分类号： H01L25/065 ,  H05K1/14 ,  H01L23/522 ,  H01L23/495 ,  H01L25/00

CPC分类号： H01L25/0657 ,  H05K1/144 ,  H01L23/5226 ,  H01L23/49586 ,  H01L25/50

摘要： The present disclosure generally relates to stacked miniaturized electronic devices and methods of forming the same. More specifically, embodiments described herein relate to semiconductor device spacers and methods of forming the same. The semiconductor device spacers described herein may be utilized to form stacked semiconductor package assemblies, stacked PCB assemblies, and the like.

公开(公告)号：US20220375787A1

公开(公告)日：2022-11-24

申请号：US17323381

申请日：2021-05-18

申请人： Applied Materials, Inc.

发明人： Wei-Sheng LEI ,  Kurtis LESCHKIES ,  Roman GOUK ,  Giback PARK ,  Kyuil CHO ,  Tapash CHAKRABORTY ,  Han-Wen CHEN ,  Steven VERHAVERBEKE

IPC分类号： H01L21/768 ,  H01L21/48

摘要： The present disclosure relates to micro-via structures for interconnects in advanced wafer level semiconductor packaging. The methods described herein enable the formation of high-quality, low-aspect-ratio micro-via structures with improved uniformity, thus facilitating thin and small-form-factor semiconductor devices having high I/O density with improved bandwidth and power.

公开(公告)号：US20220373883A1

公开(公告)日：2022-11-24

申请号：US17883422

申请日：2022-08-08

申请人： Applied Materials, Inc.

发明人： Roman GOUK ,  Jean DELMAS ,  Steven VERHAVERBEKE ,  Chintan BUCH

IPC分类号： G03F7/00 ,  B29C59/02 ,  B29C45/37

摘要： An imprint lithography stamp includes a stamp body having a patterned surface and formed from a fluorinated ethylene propylene copolymer. The imprint lithography stamp further includes a backing plate with a plurality of through-holes with portions of the stamp body extending into the through-holes to adhere the stamp body to the backing plate. The patterned surface of the stamp body has a plurality of protrusions extending from the stamp body, which are used to form high aspect ratio features at high processing temperatures. A mold design for forming the imprint lithography stamp and an injection molding process for forming the imprint lithography stamp are also provided.

公开(公告)号：US20220171281A1

公开(公告)日：2022-06-02

申请号：US17673951

申请日：2022-02-17

申请人： Applied Materials, Inc.

发明人： Roman GOUK ,  Giback PARK ,  Kyuil CHO ,  Han-Wen CHEN ,  Chintan BUCH ,  Steven VERHAVERBEKE ,  Vincent DICAPRIO

IPC分类号： G03F7/00 ,  H01L21/768 ,  G03F7/20

摘要： A method and apparatus for forming a plurality of vias in panels for advanced packaging applications is disclosed, according to one embodiment. A redistribution layer is deposited on a substrate layer. The redistribution layer may be deposited using a spin coating process, a spray coating process, a drop coating process, or lamination. The redistribution layer is then micro-imprinted using a stamp inside a chamber. The redistribution layer and the stamp are then baked inside the chamber. The stamp is removed from the redistribution layer to form a plurality of vias in the redistribution layer. Excess residue built-up on the redistribution layer may be removed using a descumming process. A residual thickness layer disposed between the bottom of each of the plurality of vias and the top of the substrate layer may have thickness of less than about 1 μm.

公开(公告)号：US20220139884A1

公开(公告)日：2022-05-05

申请号：US17578271

申请日：2022-01-18

申请人： Applied Materials, Inc.

发明人： Kurtis LESCHKIES ,  Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Giback PARK ,  Kyuil CHO ,  Jeffrey L. FRANKLIN ,  Wei-Sheng LEI

IPC分类号： H01L25/065 ,  H05K1/14 ,  H01L23/522 ,  H01L23/495 ,  H01L25/00

摘要： The present disclosure generally relates to stacked miniaturized electronic devices and methods of forming the same. More specifically, embodiments described herein relate to semiconductor device spacers and methods of forming the same. The semiconductor device spacers described herein may be utilized to form stacked semiconductor package assemblies, stacked PCB assemblies, and the like.

公开(公告)号：US20210159160A1

公开(公告)日：2021-05-27

申请号：US16886704

申请日：2020-05-28

申请人： Applied Materials, Inc.

发明人： Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Giback PARK ,  Kyuil CHO ,  Kurtis LESCHKIES ,  Roman GOUK ,  Chintan BUCH ,  Vincent DICAPRIO ,  Bernhard STONAS ,  Jean DELMAS

IPC分类号： H01L23/498 ,  H01L21/48 ,  H01L23/14

摘要： The present disclosure relates to semiconductor core assemblies and methods of forming the same. The semiconductor core assemblies described herein may be utilized to form semiconductor package assemblies, PCB assemblies, PCB spacer assemblies, chip carrier assemblies, intermediate carrier assemblies (e.g., for graphics cards), and the like. In one embodiment, a silicon substrate core is structured by direct laser patterning. One or more conductive interconnections are formed in the substrate core and one or more redistribution layers are formed on surfaces thereof. The silicon substrate core may thereafter be utilized as a core structure for a semiconductor package, PCB, PCB spacer, chip carrier, intermediate carrier, or the like.

公开(公告)号：US20200243432A1

公开(公告)日：2020-07-30

申请号：US16256809

申请日：2019-01-24

申请人： Applied Materials, Inc.

发明人： Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Kyuil CHO ,  Prayudi LIANTO ,  Guan Huei SEE ,  Vincent DICAPRIO

IPC分类号： H01L23/498 ,  H01L21/48 ,  H01L23/14

摘要： A method for producing an electrical component is disclosed using a molybdenum adhesion layer, connecting a polyimide substrate to a copper seed layer and copper plated attachment.

公开(公告)号：US20200159113A1

公开(公告)日：2020-05-21

申请号：US16192546

申请日：2018-11-15

申请人： Applied Materials, Inc.

发明人： Roman GOUK ,  Giback PARK ,  Kyuil CHO ,  Han-Wen CHEN ,  Chintan BUCH ,  Steven VERHAVERBEKE ,  Vincent DICAPRIO

IPC分类号： G03F7/00 ,  G03F7/20 ,  H01L21/768

摘要： A method and apparatus for forming a plurality of vias in panels for advanced packaging applications is disclosed, according to one embodiment. A redistribution layer is deposited on a substrate layer. The redistribution layer may be deposited using a spin coating process, a spray coating process, a drop coating process, or lamination. The redistribution layer is then micro-imprinted using a stamp inside a chamber. The redistribution layer and the stamp are then baked inside the chamber. The stamp is removed from the redistribution layer to form a plurality of vias in the redistribution layer. Excess residue built-up on the redistribution layer may be removed using a descumming process. A residual thickness layer disposed between the bottom of each of the plurality of vias and the top of the substrate layer may have thickness of less than about 1 μm.