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公开(公告)号：US07516424B2
公开(公告)日：2009-04-07
申请号：US11358456
申请日：2006-02-21
IPC分类号： G06F17/50
CPC分类号： G06F17/5022
摘要： A method, system and computer program product for modeling and simulating a powergated hierarchical element of an integrated circuit is disclosed. In modeling a powergated macro, the invention does not model all logic gates or elements as powergated, instead, the invention only models latches as connected to an integrated switch to be powergated. In addition, a fence circuit attached to the powergated macro is modeled as including an extra control signal to force a powergated state of the powergated macro into the fence circuit.
摘要翻译： 公开了一种用于建模和模拟集成电路的功率分级元件的方法，系统和计算机程序产品。 在对功率宏进行建模时，本发明不将所有逻辑门或元件建模为功率门限，相反，本发明仅将连接到集成开关的锁存器模拟为被加电的宏。 另外，附加到电力宏观的栅栏电路被建模为包括额外的控制信号，以将强力宏观的电力状态强制进入栅栏电路。
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22.发明申请公开(公告)号：US20080263383A1
公开(公告)日：2008-10-23
申请号：US12163493
申请日：2008-06-27
IPC分类号： G06F1/04
CPC分类号： G06F11/008
摘要： A number of performance parameters for the electronic system are determined at a particular age of the electronic system. The performance parameters can be correlated to maximum operating frequency of electronic components of the electronic system for the particular age of the electronic system. Operating frequency of the electronic components is adjusted in accordance with the performance parameters. The performance parameters may be predetermined (such as through reliability and burn-in testing), determined during the life of the electronic system, or some combination of these. Performance parameters can comprise prior operating frequencies, hours of operation, ambient temperature, and supply voltage. Performance parameters can comprise performance statistics determined using age-monitoring circuits, where an aged circuit is compared with a circuit enabled only for comparison. Performance statistics may also be determined though error detection circuits. If an error is detected, the operating frequency can be reduced.
摘要翻译： 在电子系统的特定年龄确定电子系统的许多性能参数。 性能参数可以与电子系统的特定年龄的电子系统的电子部件的最大工作频率相关联。 电子元件的工作频率根据性能参数进行调整。 性能参数可以是预定的（例如通过可靠性和老化测试），在电子系统的寿命期间确定，或者这些的一些组合。 性能参数可以包括以前的工作频率，工作时间，环境温度和电源电压。 性能参数可以包括使用年龄监测电路确定的性能统计，其中老化电路与仅用于比较的电路进行比较。 也可以通过错误检测电路来确定性能统计。 如果检测到错误，则可以减少工作频率。
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公开(公告)号：US07115912B2
公开(公告)日：2006-10-03
申请号：US10324963
申请日：2002-12-20
IPC分类号： H01L27/15
CPC分类号： H01L23/576 , G01R31/311 , G01R31/31719 , H01L23/573 , H01L27/02 , H01L27/0207 , H01L2924/0002 , Y10S257/922 , H01L2924/00
摘要： An integrated circuit chip (IC) is equipped with a device for preventing reverse engineering by monitoring light emissions emitted from transistors and such electrically active devices in a circuit located in the IC. The device can be an opaque structure that blocks emissions from being detected external to the IC. Alternatively, the device can reduce light emissions from the transistors to prevent detection of the light emissions external to the IC. The device, in another alternative, can emit extraneous light emissions to hide a pattern of light emissions emitted from the transistors. As a further alternative, the device can add random delay to a signal driving the transistors to randomize the pattern of light emissions emitted from the transistors to prevent detection of a predetermined pattern of light emissions external to the IC.
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公开(公告)号：US06876252B2
公开(公告)日：2005-04-05
申请号：US10609360
申请日：2003-06-28
CPC分类号： H03K17/163 , H03K17/164
摘要： A semiconductor integrated circuit including a non-abrupt switching mechanism for a sleep transistor of a power gate structure to reduce ground bounce is provided. The semiconductor integrated circuit comprises a supply voltage line; a ground voltage line; a virtual ground voltage line; a logic circuit coupled to the supply voltage line and the virtual ground voltage line; at least one sleep transistor for controlling current flow to the logic circuit, the sleep transistor being coupled to the virtual ground voltage line and the ground voltage line; and a non-abrupt switching circuit for sequentially controlling the sleep transistor. The switching mechanism reduces the magnitude of voltage glitches on the power and ground rails as well as the minimum time required to stabilize power and ground.
摘要翻译： 提供一种包括用于减少地面反弹的功率门结构的休眠晶体管的非突变切换机构的半导体集成电路。 半导体集成电路包括电源电压线; 地电压线; 虚拟地电压线; 耦合到电源电压线和虚拟接地电压线的逻辑电路; 至少一个睡眠晶体管，用于控制到逻辑电路的电流，睡眠晶体管耦合到虚拟接地电压线和地电压线; 以及用于依次控制睡眠晶体管的非突变切换电路。 开关机构可以减少电源和接地导轨上的电压毛刺的大小以及稳定电源和接地所需的最短时间。
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25.发明授权Noninvasive optical method and system for inspecting or testing CMOS circuits 有权CMOS电路检测或测试无创光学方法及系统公开(公告)号：US06774647B2
公开(公告)日：2004-08-10
申请号：US10072486
申请日：2002-02-07
IPC分类号： H01H3102
CPC分类号： G01R31/311 , G01R31/2621 , G01R31/30
摘要： A method and system for testing an integrated circuit. The method comprises the steps of obtaining periodic optical emissions over a defined period of time and from a defined area of an integrated circuit operating with time-varying internal currents, and time resolving said emissions by photon timing to estimate the number of switching events occurring in said defined area over said defined period. The method further comprises the steps of providing an optical emission model, and comparing the optical emissions from the area of the integrated circuit with the optical emission model to determine whether any of a group of defined conditions are present on the integrated circuit. For example, this test may be used to detect local power supply loading under high power density operation, or to derive changes in mobility due to heating effects.
摘要翻译： 一种用于测试集成电路的方法和系统。 该方法包括以下步骤：在规定的时间段内和从随时间变化的内部电流运行的集成电路的定义区域获得周期性的光发射，以及通过光子定时解析所述发射的时间，以估计发生在 所述定义的区域在所述限定的周期内。 该方法还包括以下步骤：提供光发射模型，以及将来自集成电路的区域的光发射与光发射模型进行比较，以确定集成电路中是否存在一组定义的条件。 例如，该测试可以用于在高功率密度操作下检测局部电源负载，或者导致由于加热效应引起的移动性变化。
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26.发明授权System and method for compressing and analyzing time-resolved optical data obtained from operating integrated circuits 失效用于压缩和分析从操作集成电路获得的时间分辨光学数据的系统和方法
公开(公告)号：US06028952A
公开(公告)日：2000-02-22
申请号：US26063
申请日：1998-02-19
IPC分类号： G01R31/302 , G01R31/311 , G06K9/00
CPC分类号： G01R31/311
摘要： A system and method to reduce, compress, and analyze the raw data obtained in an apparatus which measures the time-resolved emission of light from an operating integrated circuit is described. The system and method reduce the storage requirements for a tool which measures this emission, and can also reduce the computational time for analysis of the data.
摘要翻译： 描述了一种用于减少，压缩和分析在从操作集成电路测量光的时间分辨发射的装置中获得的原始数据的系统和方法。 该系统和方法降低了测量这种排放的工具的存储要求，并且还可以减少数据分析的计算时间。
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