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    Memory device sideband systems and methods
    21.
    发明授权
    Memory device sideband systems and methods 有权

    公开(公告)号：US12198774B2

    公开(公告)日：2025-01-14

    申请号：US17710601

    申请日：2022-03-31

    Applicant: Micron Technology, Inc.

    Inventor： Joshua E. Alzheimer

    IPC: G11C29/36 ,  G11C7/10 ,  G11C29/12

    Abstract: A memory device may include sideband circuitry to provide additional functionality without interfering with normal operations of the memory device. The memory device may also include sideband pins to provide sideband information to an external device. The sideband information may include various digital or analog signals. In some cases, a sideband circuit of the memory device may use a data protocol for communicating the sideband information with the external device. Furthermore, systems and methods for receiving sideband information from multiple memory devices of a memory system are described to reduce latency and increase functionality of a memory system including such memory devices.

    Load balancing method for two compressors
    23.
    发明授权
    Load balancing method for two compressors 有权

    公开(公告)号：US12196469B2

    公开(公告)日：2025-01-14

    申请号：US17764952

    申请日：2020-09-25

    Applicant: York (Wuxi) Air Conditioning and Refrigeration Co., Ltd. ,  Johnson Controls Tyco IP Holdings LLP

    Inventor： Haifeng Cai ,  Xijiao Ma ,  Yuqian Liu ,  Chen Zhu

    IPC: F25B49/02 ,  F25B7/00

    Abstract: A load balancing method for two compressors. The two compressors are used in a refrigeration system and are driven coaxially by the same driving device. The method comprises the steps of obtaining parameters, determining balance, and controlling start/stop states. The parameters in the step of obtaining parameters are parameters related to the two compressors. The step of determining balance comprises determining, on the basis of the obtained parameters related to the two compressors, whether load is balanced between the two compressors. The step of controlling start/top states comprises controlling the start/stop states of the two compressors according to whether the load is balanced.

    Distributed ledger for network security management
    28.
    发明授权
    Distributed ledger for network security management 有权

    公开(公告)号：US12184664B1

    公开(公告)日：2024-12-31

    申请号：US18330001

    申请日：2023-06-06

    Applicant: United Services Automobile Association (USAA)

    Inventor： Ruthie D. Lyle ,  Bharat Prasad ,  Eric David Schroeder ,  Minya Liang ,  Thomas Bret Buckingham ,  Gabriel C. Fernandez

    IPC: G06Q40/00 ,  H04L9/40

    Abstract: Techniques are described for managing a network through use of a security device that includes, or has access to, a blockchain node. The security device may manage a network of Internet-of-Things (IoT) devices in a home or other environment. The security device may act as an intermediary to manage secure, trusted communications between the IoT device(s) and external service(s). The security device may also provide network security features such as a network firewall. In some implementations, the security device may run a blockchain node, and the blockchain could be used to establish a verifiable home identity. The security device may interact with external resources and/or services, such as utility services, e-commerce services, and so forth, through this secure mechanism.

    Split pass device applications for DAC supply systems
    29.
    发明授权
    Split pass device applications for DAC supply systems 有权

    公开(公告)号：US12184294B2

    公开(公告)日：2024-12-31

    申请号：US17872993

    申请日：2022-07-25

    Applicant: Apple Inc.

    Inventor： Antonio Passamani ,  Timo W Gossmann ,  Adrien F Vargas ,  Guillaume Gourlat

    IPC: H03M1/00 ,  G05F1/575 ,  H03F3/20 ,  H03F3/45 ,  H03G3/20 ,  H03M1/66

    Abstract: The present disclosure relates to power management for digital-to-analog converters (DACs). As electronic devices and the components therein become increasingly smaller to satisfy the desire for more compact/portable devices, the operating voltage may be reduced to reduce the likelihood of shorts and/or voltage/current bleeds. To maintain comparable power output with the reduced operating voltage, the current may increase proportionally to the decrease in voltage. Consequently, in scaled devices and applications, high-current low-voltage regulators may be beneficial. As such, a low-dropout regulator (LDO) including one or more operational amplifiers and multiple pass devices may be implemented between a power supply and the DAC to regulate the power supply to the DAC. Moreover, the LDO may include one or more feedback loops to maintain a desired voltage regulation of the pass devices.

    Memory array with compensated word line access delay
    30.
    发明授权
    Memory array with compensated word line access delay 有权

    公开(公告)号：US12183420B2

    公开(公告)日：2024-12-31

    申请号：US17899849

    申请日：2022-08-31

    Applicant: Micron Technology, Inc.

    Inventor： Si Hong Kim ,  John D. Porter

    IPC: G11C7/10 ,  G11C7/22 ,  G11C8/08

    Abstract: Systems and method for sensing an accessed voltage value associated with a memory cell is described. In different embodiments, a memory array may include a different number of sense components. Moreover, each sense component may receive latching signals to latch the accessed voltage value of memory cells of the memory array based on different timings. For example, the memory array may latch digit line voltages of memory cells positioned farther from a respective word line driver at a later time based on a latching signal with a higher delay. Such memory arrays may include circuitry to receive and/or generate the delayed latching signals as well as selection circuitry for latching the digit line voltages based on a selected delayed latching signals.

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