公开(公告)号：US10321162B2

公开(公告)日：2019-06-11

申请号：US15175944

申请日：2016-06-07

Applicant: QUALCOMM Incorporated

Inventor： Adarsh Krishnan Ramasubramonian ,  Xiang Li ,  Joel Sole Rojals ,  Marta Karczewicz ,  Sungwon Lee ,  Dmytro Rusanovskyy ,  Done Bugdayci Sansli

IPC: H04N19/00 ,  H04N19/86 ,  H04N19/187 ,  H04N19/615 ,  H04N19/147 ,  H04N19/119 ,  H04N19/587 ,  H04N19/105 ,  H04N19/96 ,  H04N19/13 ,  H04N19/50 ,  H04N19/176 ,  H04N19/30 ,  H04N19/103 ,  H04N19/186 ,  H04N19/36

Abstract: Techniques are described for identifying and reducing the incidence of artifacts in video using color gamut scalability (CGS) parameters and tables in scalable video coding (SVC). Derivation of CGS mapping tables are performed for each partition of pixel values in a color space. The pixel value domain is split into partitions and each is optimized independently. Color prediction techniques for CGS may be used by video encoders and/or video decoders to generate inter-layer reference pictures when a color gamut for a lower layer of video data is different than a color gamut for a higher layer of the video data. When mapped values are used as inter-layer predication references for the enhancement layer blocks, artifacts may appear in some frames of the sequences. A video encoder may identify blocks that potentially contain these artifacts and disable inter-layer prediction in those identified blocks.

公开(公告)号：US10264286B2

公开(公告)日：2019-04-16

申请号：US14749527

申请日：2015-06-24

Applicant: QUALCOMM Incorporated

Inventor： Adarsh Krishnan Ramasubramonian ,  Ye-Kui Wang

IPC: H04N19/30 ,  H04N19/70 ,  H04N19/50 ,  H04N19/597

Abstract: An apparatus configured to code video information in a bitstream includes a memory and a processor in communication with the memory. The memory is configured to store video information associated with a plurality of video layers in the bitstream, the plurality of video layers in the bitstream divided into a plurality of bitstream partitions, herein each bitstream partition contains at least one of the plurality of video layers. The processor is configured to process a bitstream conformance parameter associated with a first bitstream partition of the plurality of bitstream partitions, wherein the bitstream conformance parameter is applicable to the first bitstream partition but not to another portion of the bitstream not encompassed by the first bitstream partition. The processor may encode or decode the video information in the bitstream.

公开(公告)号：US10244245B2

公开(公告)日：2019-03-26

申请号：US15176034

申请日：2016-06-07

Applicant: QUALCOMM Incorporated

Inventor： Dmytro Rusanovskyy ,  Sungwon Lee ,  Done Bugdayci Sansli ,  Joel Sole Rojals ,  Adarsh Krishnan Ramasubramonian ,  Marta Karczewicz

IPC: H04N19/169 ,  H04N19/186 ,  H04N19/615 ,  H04N19/117 ,  H04N19/136 ,  H04N19/85 ,  H04N19/98

Abstract: This disclosure relates to processing video data, including processing video data to conform to a high dynamic range (HDR)/wide color gamut (WCG) color container. The techniques apply, on an encoding side, pre-processing of color values prior to application of a static transfer function and/or apply post-processing on the output from the application of the static transfer function. By applying pre-processing, the examples may generate color values that when compacted into a different dynamic range by application of the static transfer function linearize the output codewords. By applying post-processing, the examples may increase signal to quantization noise ratio. The examples may apply the inverse of the operations on the encoding side on the decoding side to reconstruct the color values.

公开(公告)号：US10244242B2

公开(公告)日：2019-03-26

申请号：US14749526

申请日：2015-06-24

Applicant: QUALCOMM Incorporated

Inventor： Ye-Kui Wang ,  Fnu Hendry ,  Adarsh Krishnan Ramasubramonian

IPC: H04N19/174 ,  H04N19/70 ,  H04N19/187 ,  H04N19/423 ,  H04N19/44 ,  H04N19/129 ,  H04N19/30 ,  H04N19/513 ,  H04N19/196 ,  H04N19/40

Abstract: A device for processing video data includes a memory configured to store at least a portion of a multi-layer bitstream of video data; and one or more processors configured to receive the portion of the multi-layer bitstream, the multi-layer bitstream comprising a plurality of layers, the plurality of layers comprising a non-independently decodable non-base layer (non-INBL) and an independently decodable non-base layer (INBL); receive a video parameter set (VPS) associated with the coded video data, the VPS comprising first representation format parameters; receive a sequence parameter set (SPS) associated with the INBL, the SPS comprising second representation format parameters; process the non-INBL based on the first representation format parameters; and process the INBL based on the second representation format parameters.

公开(公告)号：US09942546B2

公开(公告)日：2018-04-10

申请号：US14567710

申请日：2014-12-11

Applicant: QUALCOMM Incorporated

Inventor： Fnu Hendry ,  Ye-Kui Wang ,  Adarsh Krishnan Ramasubramonian

IPC: H04N19/00 ,  H04N19/105 ,  H04N19/114 ,  H04N19/136 ,  H04N19/172 ,  H04N19/169 ,  H04N19/44 ,  H04N19/90 ,  H04N19/597 ,  H04N19/70 ,  H04N19/30 ,  H04N19/103 ,  H04N19/65

CPC classification number: H04N19/105 ,  H04N19/103 ,  H04N19/114 ,  H04N19/136 ,  H04N19/172 ,  H04N19/188 ,  H04N19/30 ,  H04N19/44 ,  H04N19/597 ,  H04N19/65 ,  H04N19/70 ,  H04N19/90

Abstract: In an example, a method of decoding video data includes decoding data that indicates a picture order count (POC) reset for a POC value of a first picture of a first received layer of multi-layer video data, where the first picture is included in an access unit. The method also includes, based on the data that indicates the POC reset for the POC value of the first picture and prior to decoding the first picture, outputting all pictures stored in a decoded picture buffer (DPB) that precede the first picture in coding order and that are not included in the access unit.

公开(公告)号：US09930342B2

公开(公告)日：2018-03-27

申请号：US14743556

申请日：2015-06-18

Applicant: QUALCOMM Incorporated

Inventor： Ye-Kui Wang ,  Fnu Hendry ,  Adarsh Krishnan Ramasubramonian

IPC: H04N19/70 ,  H04N19/146 ,  H04N19/44 ,  H04N19/184 ,  H04N19/30 ,  H04N19/46 ,  H04N19/513 ,  H04N19/597 ,  H04N19/463

CPC classification number: H04N19/146 ,  H04N19/184 ,  H04N19/30 ,  H04N19/44 ,  H04N19/46 ,  H04N19/463 ,  H04N19/513 ,  H04N19/597 ,  H04N19/70

Abstract: Techniques and systems are provided for encoding and decoding video data. For example, a method of encoding video data includes generating an encoded video bitstream comprising multiple layers. The encoded video bitstream includes a video parameter set defining parameters of the encoded video bitstream. The video parameter set includes video usability information. The method further includes determining whether timing information is signaled in the video usability information of the video parameter set. The method further includes determining whether to signal hypothetical reference decoder parameters in the video usability information of the video parameter set based on whether timing information is signaled in the video usability information.

公开(公告)号：US20180048913A1

公开(公告)日：2018-02-15

申请号：US15670832

申请日：2017-08-07

Applicant: QUALCOMM Incorporated

Inventor： Joel Sole Rojals ,  Done Bugdayci Sansli ,  Adarsh Krishnan Ramasubramonian ,  Dmytro Rusanovskyy

IPC: H04N19/597 ,  H04N19/30 ,  H04N19/52

CPC classification number: H04N19/597 ,  H04N19/186 ,  H04N19/30 ,  H04N19/46 ,  H04N19/52 ,  H04N19/70 ,  H04N19/85

Abstract: In one example, a method includes determining, by a video decoding unit, a peak brightness value of a current display; obtaining, by the video decoding unit and for a picture of video data, one or more colour remapping messages that each correspond to a respective peak brightness value of a set of peak brightness values; selecting, by the video decoding unit and based on the peak brightness value of the current display, a colour remapping message of the one or more colour remapping messages; colour remapping, by the video decoding unit and based on the selected colour remapping message, samples of the picture of video data; and outputting, by the video decoding unit and for display at the current display, the colour remapped samples of the picture of video data.

公开(公告)号：US09894370B2

公开(公告)日：2018-02-13

申请号：US14665953

申请日：2015-03-23

Applicant: QUALCOMM Incorporated

Inventor： Ye-Kui Wang ,  Adarsh Krishnan Ramasubramonian ,  Fnu Hendry

IPC: H04N19/37 ,  H04N19/88 ,  H04N19/60 ,  H04N19/70 ,  H04N19/89 ,  H04N19/30

CPC classification number: H04N19/37 ,  H04N19/30 ,  H04N19/60 ,  H04N19/70 ,  H04N19/88 ,  H04N19/89

Abstract: In an example, a method of coding video data includes coding one or more non-video coding layer (VCL) network abstraction layer (NAL) units of a layer of a multi-layer bitstream of video data, where the one or more non-VCL NAL units contain an SEI message having an SEI payload type. The method also includes determining one or more syntax values of the multi-layer bitstream to which the SEI message applies based on the SEI payload type.

公开(公告)号：US09866851B2

公开(公告)日：2018-01-09

申请号：US14741253

申请日：2015-06-16

Applicant: QUALCOMM Incorporated

Inventor： Fnu Hendry ,  Adarsh Krishnan Ramasubramonian ,  Ye-Kui Wang

IPC: H04N19/187 ,  H04N19/31 ,  H04N19/33 ,  H04N13/00 ,  H04N19/46 ,  H04N19/30 ,  H04N19/107 ,  H04N19/157 ,  H04N19/70 ,  H04W84/04 ,  H04W88/02

CPC classification number: H04N19/187 ,  H04N13/161 ,  H04N19/107 ,  H04N19/157 ,  H04N19/30 ,  H04N19/31 ,  H04N19/33 ,  H04N19/46 ,  H04N19/70 ,  H04W84/042 ,  H04W88/02

Abstract: An apparatus for coding video information according to certain aspects includes a memory unit configured to store video information associated with a plurality of layers and a processor. The processor is configured to obtain information associated with a current access unit (AU) to be coded, the current AU containing pictures from one or more layers of the plurality of layers. The processor is also configured to reset a picture order count (POC) of a layer included in the current AU via (1) resetting only a most significant bit (MSB) of the POC or (2) resetting both the MSB of the POC and a least significant (LSB) of the POC. The processor is further configured to, for pictures in one or more AUs subsequent to the current AU in decoding order: set a value of a first flag indicative whether a reset of the POC is a full reset.

公开(公告)号：US09854270B2

公开(公告)日：2017-12-26

申请号：US14575788

申请日：2014-12-18

Applicant: QUALCOMM Incorporated

Inventor： Adarsh Krishnan Ramasubramonian ,  Fnu Hendry ,  Ye-Kui Wang

IPC: H04N7/12 ,  H04N11/02 ,  H04N11/04 ,  H04N19/597 ,  H04N19/52 ,  H04N19/70 ,  H04N19/463

CPC classification number: H04N19/597 ,  H04N19/463 ,  H04N19/52 ,  H04N19/70

Abstract: An apparatus configured to code video information includes a memory unit and a processor in communication with the memory unit. The memory unit is configured to store video information associated with a first video layer having a current picture. The processor is configured to process a first offset associated with the current picture, the first offset indicating a difference between (a) most significant bits (MSBs) of a first picture order count (POC) of a previous picture in the first video layer that precedes the current picture in decoding order and (b) MSBs of a second POC of the current picture.