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    Delay circuit and semiconductor memory device having the same
    192.
    发明授权
    Delay circuit and semiconductor memory device having the same 有权
    延迟电路和具有相同的半导体存储器件

    公开(公告)号：US07773434B2

    公开(公告)日：2010-08-10

    申请号：US12157243

    申请日：2008-06-09

    Applicant: Sang-Hee Lee

    Inventor： Sang-Hee Lee

    IPC: G11C7/00

    CPC classification number: G11C7/08 ,  G11C11/4091 ,  G11C11/4094

    Abstract: A delay circuit is capable of securing a constant delay time in spite of a process variation as well as voltage and temperature variations. Using the delay circuit that secures a sensing margin time in spite of process, voltage and temperature variations, a semiconductor memory device is capable of amplifying desired data within a preset RAS to CAS delay (tRCD). The delay circuit includes a delay unit including a current source controlled by a bias voltage, a delay time of the delay unit being changed depending on current amount of the current source, and a bias voltage generating unit configured to divide a power supply voltage using a first resistor to generate the bias voltage, wherein the delay unit includes a second resistor inserted into a current path of the current source.

    Abstract translation: 尽管工艺变化以及电压和温度变化，延迟电路能够确保恒定的延迟时间。 使用延迟电路，尽管处理，电压和温度变化确保感测余量时间，半导体存储器件能够将预设RAS内的期望数据放大至CAS延迟（tRCD）。 延迟电路包括延迟单元，其包括由偏置电压控制的电流源，延迟单元的延迟时间根据电流源的电流量而改变;以及偏置电压产生单元，其被配置为使用 第一电阻器以产生偏置电压，其中所述延迟单元包括插入到所述电流源的电流路径中的第二电阻器。

    Layout method for mask
    193.
    发明授权
    Layout method for mask 失效
    面罩布局方法

    公开(公告)号：US07763398B2

    公开(公告)日：2010-07-27

    申请号：US11842872

    申请日：2007-08-21

    Applicant: Sang Hee Lee ,  Gab Hwan Cho

    Inventor： Sang Hee Lee ,  Gab Hwan Cho

    IPC: G03F1/00 ,  G03F1/14 ,  G06F17/50

    CPC classification number: H01L21/033 ,  G03F1/36

    Abstract: A layout method for a mask can include forming a cell including a first main pattern. A second main pattern can be formed in a main chip layout, and the cell can be inserted into the main chip layout. A dummy pattern inhibiting region can be created on the basis of the first main pattern and the second main pattern. Then, plural dummy patterns having a single common shape can be formed over the entire main chip layout into which the cell is inserted. Dummy patterns that overlap with the dummy pattern inhibiting region can be removed.

    Abstract translation: 掩模的布局方法可以包括形成包括第一主图案的单元。 可以在主芯片布局中形成第二主图案，并且可以将单元插入主芯片布局。 可以基于第一主图案和第二主图案来创建伪图案禁止区域。 然后，可以在插入单元的整个主芯片布局上形成具有单一共同形状的多个虚设图案。 可以去除与虚拟图案抑制区域重叠的虚拟图案。

    PREPARATION OF AN ARTIFICIAL TRANSCRIPTION FACTOR COMPRISING ZINC FINGER PROTEIN AND TRANSCRIPTION FACTOR OF PROKARYOTE, AND A USE THEREOF
    195.
    发明申请
    PREPARATION OF AN ARTIFICIAL TRANSCRIPTION FACTOR COMPRISING ZINC FINGER PROTEIN AND TRANSCRIPTION FACTOR OF PROKARYOTE, AND A USE THEREOF 有权
    制备包含锌指纹蛋白和原核生物转录因子的人工转录因子及其用途

    公开(公告)号：US20100136663A1

    公开(公告)日：2010-06-03

    申请号：US12444842

    申请日：2006-12-15

    Applicant: Sun-Chang KIM ,  Ju-Young Lee ,  Bong-Hyun Sung ,  Jun-Hyoung Lee ,  Sang-Hee Lee ,  Kui-Hyeon Kang

    Inventor： Sun-Chang KIM ,  Ju-Young Lee ,  Bong-Hyun Sung ,  Jun-Hyoung Lee ,  Sang-Hee Lee ,  Kui-Hyeon Kang

    IPC: C12N1/21 ,  C07K14/435

    CPC classification number: C07K14/4702 ,  C07K2319/81

    Abstract: The present invention relates to an artificial transcription factor which can artificially regulate gene expression of an E. coli, wherein the transcription factor comprising zinc finger proteins and transcription factors of prokaryote, and to be engineered E. coli using the same. Specifically, the artificial transcription factors in E. coli as effector domains are prepared and said artificial transcription library is introduced to E. coli to effectively and artificially regulate gene expression regardless of an activity of endogenous transcription factors in the E. coli and to induce E. coli having various desired phenotypes. Thus, only E. coli having the desired phenotypes useful for industries can be selected and used.

    Abstract translation: 本发明涉及人工调节大肠杆菌基因表达的人工转录因子，其中包含锌指蛋白的转录因子和原核生物的转录因子，以及使用其的工程化大肠杆菌。 具体而言，制备大肠杆菌作为效应域的人工转录因子，并且将所述人工转录文库导入大肠杆菌以有效和人为地调节基因表达，而不管大肠杆菌内源性转录因子的活性如何，并诱导E 具有各种所需表型的大肠杆菌。 因此，可以选择和使用仅具有用于工业的期望表型的大肠杆菌。

    ADDRESS LATCH CIRCUIT AND SEMICONDUCTOR MEMORY APPARATUS USING THE SAME
    199.
    发明申请
    ADDRESS LATCH CIRCUIT AND SEMICONDUCTOR MEMORY APPARATUS USING THE SAME 失效
    地址锁存电路和半导体存储器使用它

    公开(公告)号：US20100034035A1

    公开(公告)日：2010-02-11

    申请号：US12346982

    申请日：2008-12-31

    Applicant: Sang Hee Lee

    Inventor： Sang Hee Lee

    IPC: G11C7/22 ,  G11C8/18 ,  G11C8/00

    CPC classification number: G11C11/408 ,  G11C8/06 ,  G11C8/18 ,  G11C11/4076

    Abstract: An address latch circuit of a semiconductor memory apparatus includes a control signal generating section configured to generate a control signal in response to an external command signal and a RAS idle signal, a clock control section configured to output a clock signal as a control clock signal when the control signal is enabled and to fix the control clock signal to a predetermined level when the control signal is disabled, and an address latch section configured to latch an address signal in response to the control clock signal.

    Abstract translation: 半导体存储装置的地址锁存电路包括：控制信号生成部，被配置为响应于外部指令信号和RAS空闲信号而产生控制信号;时钟控制部，被配置为输出时钟信号作为控制时钟信号， 控制信号被使能并且当禁止控制信号时将控制时钟信号固定到预定电平，以及地址锁存部分，被配置为响应于控制时钟信号锁存地址信号。

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