公开(公告)号：US4882585A

公开(公告)日：1989-11-21

申请号：US169865

申请日：1988-03-17

Applicant: Terry D. Beard

Inventor： Terry D. Beard

IPC: H03M3/00 ,  H03M1/00

CPC classification number: H03M1/208 ,  H03M1/661

Abstract: A method and system for encoding a series of input digital signals in a higher order digital format, such as 16 bit, to a series of lower order digital signals such as 8 bit, and then recovering the original input signals with a greater accuracy than previously attainable is described. A distinct reduction in quantization noise is produced, making the system compatible with very high resolution audio equipment such as compact disks. For each input signal, a particular pair of complementary encoding and decoding transformations are selected from a set of numerous possible transformations. The transformations are nonlinear, with high resolutions near the origin and much lower resolutions further away. The high resolution range increases from table to table, while the absolute resolution within said ranges decreases. The value of each input signal is predicted from previous signals, and a differential quantity representing the prediction error is used in selecting the table for each signal. Overall quantization noise is significantly reduced by updating the table selections so that the differential quantity remains within the high resolution range. Identical decoding circuitry is provided in both the encoder and decoder to assure tracking between the two. An analog-to-digital conversion is provided at the input, with a reverse conversion at the output.

Abstract translation: 一种用于将诸如16位的高阶数字格式的一系列输入数字信号编码为诸如8位的一系列低阶数字信号的方法和系统，然后以比以前更高的精度恢复原始输入信号 描述可达到的。 产生了量化噪声的显着降低，使系统与非常高分辨率的音频设备（如光盘）兼容。 对于每个输入信号，从一组许多可能的变换中选择一对特定的互补编码和解码变换。 这些变换是非线性的，在原点附近具有高分辨率，远离更低的分辨率。 高分辨率范围从表到表增加，而所述范围内的绝对分辨率降低。 从先前的信号预测每个输入信号的值，并且在为每个信号选择表时使用表示预测误差的差分量。 通过更新表选择使得差分量保持在高分辨率范围内，总体量化噪声显着降低。 在编码器和解码器中均提供相同的解码电路，以确保两者之间的跟踪。 在输入端提供模数转换，在输出端进行反向转换。

公开(公告)号：US4562456A

公开(公告)日：1985-12-31

申请号：US542706

申请日：1983-10-17

Applicant: Thomas V. Bolger

Inventor： Thomas V. Bolger

IPC: H03M1/10 ,  H03M1/00 ,  H03M1/20 ,  H04B14/04 ,  H04N7/26 ,  H03K13/24

CPC classification number: H03M1/208

Abstract: The quantizing resolution of an analog-to-digital converter is effectively enhanced for sinusoidal input signals by (a) sampling the signal at 90 degree intervals of the sinusoid; (b) establishing the input range of the converter to be less than the dynamic range of the signal but arranged so that at least three of four successive samples are true or correct values; (c) detecting the occurrence of saturated fourth sample values; (d) calculating correct values for saturated sample values from preceding samples; and (e) substituting calculated values for saturated incorrect values.

Abstract translation: 通过（a）以正弦曲线的90度间隔采样信号，对正弦输入信号有效地增强了模数转换器的量化分辨率; （b）将转换器的输入范围建立成小于信号的动态范围，但是布置成使得四个连续采样中的至少三个为真或正确的值; （c）检测饱和第四样本值的发生; （d）从前面的样品计算饱和样品值的正确值; 和（e）将计算值代入饱和不正确值。

公开(公告)号：US20180262204A1

公开(公告)日：2018-09-13

申请号：US15979562

申请日：2018-05-15

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yasuhide TAKASE ,  Yasuyuki MATSUYA

IPC: H03M3/00 ,  G01D5/24

CPC classification number: H03M3/32 ,  G01D5/24 ,  H03M1/208 ,  H03M1/804 ,  H03M3/422 ,  H03M3/496

Abstract: A sensor device includes an A/D converter including an adder that computes a difference between an analog input signal and a predicted value, the adder includes a capacitive adder defined by a series circuit including a capacitive charge output device and a capacitor. A capacitive component in the charge output device defines a portion of the capacitance of the capacitive adder. A digital prediction filter generates the predicted value based on an output from a quantizer. The capacitive adder computes the difference between the analog input signal from the charge output device and the predicted value. The quantizer quantizes and encodes the difference. The A/D converter performs a Δ modulation on the analog input signal which is converted into a digital signal.

公开(公告)号：US08447570B2

公开(公告)日：2013-05-21

申请号：US12124892

申请日：2008-05-21

Applicant: Dirk Hammerschmidt

Inventor： Dirk Hammerschmidt

IPC: H03F1/26 ,  H02J7/00 ,  G05B13/02

CPC classification number: H03M1/208 ,  G01D1/00 ,  G01R19/2506

Abstract: A predictive sensor readout is suitable for coupling to a sensor. The predictive sensor readout includes a sampling circuit, a predictor, and a preset circuit. The sampling circuit is configured to receive and over-sample previously digitized samples of signals previously input from the sensor. The predictor is coupled to the sampling circuit and is configured to receive the over-sampled digitized samples into a signal history and to generate a predicted input from the sensor based on the signal history. The preset circuit is coupled to the predictor and the sampling circuit and is configured to present the sampling circuit to receive the predicted input from the sensor prior to sampling an actual input from the sensor.

Abstract translation: 预测传感器读数适用于耦合到传感器。 预测传感器读出器包括采样电路，预测器和预设电路。 采样电路被配置为接收和过采样先前从传感器输入的信号的数字化样本。 预测器耦合到采样电路，并且被配置为将过采样的数字化样本接收到信号历史中，并且基于信号历史从传感器生成预测输入。 预设电路耦合到预测器和采样电路，并被配置为在采样来自传感器的实际输入之前呈现采样电路以接收来自传感器的预测输入。

公开(公告)号：US20110148682A1

公开(公告)日：2011-06-23

申请号：US12642780

申请日：2009-12-19

Applicant: Kenneth Wayne Rigby ,  Robert Gideon Wodnicki ,  Krishnakumar Sundaresan ,  Naresh Kesavan Rao

Inventor： Kenneth Wayne Rigby ,  Robert Gideon Wodnicki ,  Krishnakumar Sundaresan ,  Naresh Kesavan Rao

IPC: H03M1/12

CPC classification number: H03M1/188 ,  H03M1/183 ,  H03M1/208 ,  H03M1/361 ,  H03M1/68

Abstract: Predictive Analog-to-Digital Converter system in one embodiment includes a sampling section producing a sampled analog input signal with a first summer section combining the sampled analog input signal and an analog prediction signal to produce an analog prediction error signal. There is at least one error analog-to-digital convertor digitizing the analog prediction error signal, wherein a digital error signal output from the error analog-to-digital convertor is one of a full bitwidth error signal during an over-range condition else a lower bitwidth error signal. A second summer is coupled to the digital error signal output and a digital prediction signal, and generates a full bitwidth digital output signal. A feedback section is coupled to the digital output signal and providing the digital prediction signal and the analog prediction signal.

Abstract translation: 在一个实施例中，预测模数转换器系统包括产生采样模拟输入信号的采样部分，其中组合采样的模拟输入信号和模拟预测信号的第一加法部分产生模拟预测误差信号。 至少有一个误差模拟数字转换器将模拟预测误差信号数字化，其中从误差模数转换器输出的数字误差信号是在超范围条件期间的完全位宽误差信号之一，否则 较低的位宽错误信号。 第二个夏天耦合到数字误差信号输出和数字预测信号，并产生完整的位宽数字输出信号。 反馈部分耦合到数字输出信号并提供数字预测信号和模拟预测信号。

公开(公告)号：US20070188364A1

公开(公告)日：2007-08-16

申请号：US11357553

申请日：2006-02-16

Applicant: Bruce Fette

Inventor： Bruce Fette

IPC: H03M1/12

CPC classification number: H03M1/185 ,  H03M1/0658 ,  H03M1/208

Abstract: An analog-to-digital converter (“ADC”) architecture as described herein utilizes a digital signal processor having suitably configured waveform prediction logic that can predict expected types of input signals. The ADC architecture subtracts the predictable signal components from the analog input signal prior to the analog-to-digital conversion, which extends the dynamic range of the ADC employed by the ADC architecture. In practice, the ADC architecture can subtract predictable strong signal components from an analog input signal such that the ADC can apply its available dynamic range to the remaining weak signal components.

Abstract translation: 如本文所述的模数转换器（“ADC”）架构利用具有适当配置的波形预测逻辑的数字信号处理器，其可以预测输入信号的预期类型。 ADC架构在模数转换之前从模拟输入信号中减去可预测的信号分量，这扩展了ADC架构采用的ADC的动态范围。 实际上，ADC架构可以从模拟输入信号中减去可预测的强信号分量，使得ADC可以将其可用的动态范围应用于剩余的弱信号分量。

公开(公告)号：US20050057387A1

公开(公告)日：2005-03-17

申请号：US10663729

申请日：2003-09-17

Applicant: Seetharaman Janakiraman ,  Kiran Godbole ,  Surendranath Nagesh

Inventor： Seetharaman Janakiraman ,  Kiran Godbole ,  Surendranath Nagesh

IPC: H03M1/06 ,  H03M1/20 ,  H03M1/34 ,  H03M1/12

CPC classification number: H03M1/06 ,  H03M1/0656 ,  H03M1/208

Abstract: When converting an analog signal to N-bit digital codes, high SNR (signal to noise ratio) by generating multiple N-bit codes from the same analog sample and averaging the N-bit codes. However, the entire N-bit code is determined only a single time, and only P-bit (P less than N) codes are generated. The P-bit codes may be averaged, and the N-bit code is corrected based on the average value to generate an accurate N-bit digital code. As P can be much less than N, the correction can be implemented in a few iterations, thereby enabling the ADCs to be implemented with a high throughput performance. Due to the correction, a high SNR may be attained as well.

Abstract translation: 通过从相同的模拟采样产生多个N位代码并对N位代码进行平均，将模拟信号转换为N位数字码，具有高SNR（信噪比）。 然而，整个N位代码仅被确定一次，并且仅产生P位（P小于N）个代码。 可以对P位代码进行平均，并且基于平均值校正N位代码以产生精确的N位数字代码。 由于P可以远小于N，所以可以在几次迭代中实现校正，从而使得能够以高吞吐量性能实现ADC。 由于校正，也可以获得高SNR。

公开(公告)号：US06590513B2

公开(公告)日：2003-07-08

申请号：US10141394

申请日：2002-05-08

Applicant: Philip S. Stetson ,  Teddy D. Thomas

Inventor： Philip S. Stetson ,  Teddy D. Thomas

IPC: H03M300

CPC classification number: H03M1/208 ,  H03M1/20

Abstract: A data acquisition system uses an analog-to-digital converter (ADC) that includes a prediction feedback element. Using the computing power of a digital signal processor, the system predicts the next sample of the target signal based on pre-defined rules and previous samples. This digital prediction is converted to an analog signal using a digital-to-analog converter (DAC). An analog error summer compares the predicted signal with the target signal and creates an error signal. The digital signal processor uses the prediction error to more accurately predict the next sample. A negative feedback loop is thus formed by this system to drive the prediction error toward zero. Operating on the relatively small error signal in the forward and feedback paths enhances the conversion performance and data transfer efficiency.

公开(公告)号：US6115726A

公开(公告)日：2000-09-05

申请号：US144360

申请日：1998-08-31

Applicant: Aleksandar Ignjatovic

Inventor： Aleksandar Ignjatovic

IPC: G06F17/10 ,  H03F3/217 ,  H03H17/00 ,  H03H17/02 ,  H03H17/06 ,  H03H21/00 ,  H03M1/06 ,  H03M1/08 ,  H03M1/20 ,  H03M1/66

CPC classification number: H03M1/661 ,  G06F17/10 ,  H03F3/217 ,  H03H17/06 ,  H03M1/208

Abstract: A new signal processing method and a signal processing engine which can achieve extremely fast responsiveness to instantaneous changes in the behavior of the signal, and maintain the accuracy of standard harmonic methods. The signal processing engine unifies Nyquist's theorem and Taylor's theorem by means of polynomial approximations using linear operators, e.g. differential and integral operators. The signal processing engine samples the signal at a rate which is n times the band limit of the signal, where n is greater than 2, i.e. greater than the Nyquist rate, produces a digital representation of the sampled signal, and calculates the outputs of linear operators applied to polynomial approximations of the sampled signal. A switch mode power amplifier which incorporates the signal processing method and engine of the overcomes shortcomings of existing switching amplifiers, e.g. class "D" amplifiers. These shortcomings include: poor handling of highly reactive complex loads (e.g., speakers), usually requiring a duty cycle or feed-back adjustment with the change of the load; poor performance in the upper part of the bandwidth, including numerous switching artifacts; and high distortion, especially in the upper part of the spectrum. These shortcomings are all overcome using the local signal behavior signal processing method and engine of the invention.

Abstract translation: 一种新的信号处理方法和信号处理引擎，可以实现对信号行为的瞬时变化的极快响应，并保持标准谐波方法的准确性。 信号处理引擎通过使用线性算子的多项式近似来统一奈奎斯特定理和泰勒定理，例如， 差分和积分算子。 信号处理引擎以n倍于信号的频带限制的速率对信号进行采样，其中n大于2，即大于奈奎斯特速率，产生采样信号的数字表示，并计算线性的输出 运算符应用于采样信号的多项式近似。 一种开关模式功率放大器，其结合了克服现有开关放大器的缺点的信号处理方法和引擎，例如， 类“D”放大器。 这些缺点包括：对高反应性复合负载（例如扬声器）的处理差，通常需要负载周期或负载的改变进行反馈调整; 在带宽的上部表现不佳，包括大量的切换伪影; 并且具有高失真，特别是在光谱的上部。 这些缺点都使用本发明的本地信号行为信号处理方法和引擎来克服。

公开(公告)号：US4933675A

公开(公告)日：1990-06-12

申请号：US364715

申请日：1989-06-09

Applicant: Terry D. Beard

Inventor： Terry D. Beard

IPC: H03M1/20 ,  H04B14/04

CPC classification number: H04B14/046 ,  H03M1/208

Abstract: Apparatus and an associated method are described for encoding an analog signal to a digital representation thereof and then decoding the same to reconstruct the original analog signal with reduced quantization noise and error. The analog signal is first adaptively pre-emphasized. A series of samples of the pre-emphasized signal are then obtained and encoded to create a series of digital representations which have a lower order resolution than the samples. The difference between each sample and its corresponding lower resolution digital representation is obtained and combined with the next sample. Decoding of the combined signals takes place in a complementary manner to create an approximate analog output signal, which is then de-emphasized in a manner complementary to the pre-emphasis to produce an analog output signal closely approximating the original analog signal. In a fully digital implementation the samples are converted to a digital format with a higher order resolution; the digital representations are obtained from the digitized samples, and the difference measurements are combined with the samples in their digital format. In a hybrid digital/analog implementation the difference is combined with the analog signal prior to sampling.

Abstract translation: 描述了用于将模拟信号编码为其数字表示的装置和相关方法，然后对其进行解码以用缩小的量化噪声和误差来重建原始模拟信号。 模拟信号首先被自适应地预先强调。 然后获得并重新编码预加重信号的一系列样本以产生具有比样本低的分辨率的一系列数字表示。 获得每个样本与其对应的较低分辨率数字表示之间的差异，并与下一个样本组合。 组合信号的解码以互补方式进行，以产生近似的模拟输出信号，然后以与预加重相互补充的方式去强调产生近似于原始模拟信号的模拟输出信号。 在完全数字化的实现中，样本被转换成具有较高分辨率的数字格式; 从数字化样本中获得数字表示，并将差值测量与其数字格式的样本组合。 在混合数字/模拟实现中，差异在采样之前与模拟信号组合。