公开(公告)号：US20230066954A1

公开(公告)日：2023-03-02

申请号：US17983417

申请日：2022-11-09

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Hao Lin ,  Hsin-Yu Chen ,  Shou-Wei Hsieh

IPC: H01L29/66 ,  H01L21/762

Abstract: A semiconductor device includes a gate structure on a substrate, a single diffusion break (SDB) structure adjacent to the gate structure, a first spacer adjacent to the gate structure, a second spacer adjacent to the SDB structure, a source/drain region between the first spacer and the second spacer, an interlayer dielectric (ILD) layer around the gate structure and the SDB structure, and a contact plug in the ILD layer and on the source/drain region. Preferably, a top surface of the second spacer is lower than a top surface of the first spacer.

公开(公告)号：US20210335786A1

公开(公告)日：2021-10-28

申请号：US17367447

申请日：2021-07-05

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Hao Lin ,  Hsin-Yu Chen ,  Shou-Wei Hsieh

IPC: H01L27/088 ,  H01L21/8234 ,  H01L21/308 ,  H01L21/311 ,  H01L27/02 ,  H01L21/762 ,  H01L29/06 ,  H01L29/66

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a patterned mask on the second region; and performing a process to enlarge the first fin-shaped structure so that the top surfaces of the first fin-shaped structure and the second fin-shaped structure are different.

公开(公告)号：US11088137B2

公开(公告)日：2021-08-10

申请号：US16724404

申请日：2019-12-23

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Hao Lin ,  Hsin-Yu Chen ,  Shou-Wei Hsieh

IPC: H01L29/66 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/308 ,  H01L21/311 ,  H01L27/02 ,  H01L21/762 ,  H01L29/06 ,  H01L21/84

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a patterned mask on the second region; and performing a process to enlarge the first fin-shaped structure so that the top surfaces of the first fin-shaped structure and the second fin-shaped structure are different.

公开(公告)号：US10943993B2

公开(公告)日：2021-03-09

申请号：US16396777

申请日：2019-04-29

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Hao Lin ,  Hsin-Yu Chen ,  Shou-Wei Hsieh

IPC: H01L29/66 ,  H01L21/762

Abstract: A method for fabricating semiconductor device includes: forming a fin-shaped structure on a substrate, wherein the fin-shaped structure is extending along a first direction; forming a gate layer on the fin-shaped structure; removing part of the gate layer and part of the fin-shaped structure to form a first trench for dividing the fin-shaped structure into a first portion and a second portion, wherein the first trench is extending along a second direction; forming a patterned mask on the gate layer and into the first trench; removing part of the gate layer and part of the fin-shaped structure to form a second trench, wherein the second trench is extending along the first direction; and filling a dielectric layer in the first trench and the second trench.

公开(公告)号：US10692780B2

公开(公告)日：2020-06-23

申请号：US16280043

申请日：2019-02-20

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Hao Lin ,  Hsin-Yu Chen ,  Shou-Wei Hsieh

IPC: H01L21/8238 ,  H01L29/161 ,  H01L27/092 ,  H01L29/66

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first gate structure on the first region and a second gate structure on the second region; forming a first spacer around the first gate structure; forming a first epitaxial layer adjacent to two sides of the first spacer; forming a buffer layer on the first gate structure; and forming a contact etch stop layer (CESL) on the buffer layer on the first region and the second gate structure on the second region.

公开(公告)号：US10153210B1

公开(公告)日：2018-12-11

申请号：US15618131

申请日：2017-06-09

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Hao Lin ,  Hsin-Yu Chen ,  Chun-Tsen Lu ,  Shou-Wei Hsieh

IPC: H01L29/06 ,  H01L21/8234 ,  H01L21/02

CPC classification number: H01L21/823462 ,  H01L21/02164 ,  H01L21/02233 ,  H01L21/02269 ,  H01L21/0228 ,  H01L21/823431

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region; forming a shallow trench isolation (STI) around the first fin-shaped structure; forming a first oxide layer on the first fin-shaped structure; and then forming a second oxide layer on the first oxide layer and the STI.

公开(公告)号：US09972623B1

公开(公告)日：2018-05-15

申请号：US15375177

申请日：2016-12-12

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Hao Lin ,  Shou-Wei Hsieh ,  Hsin-Yu Chen

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/51 ,  H01L21/311

CPC classification number: H01L27/092 ,  H01L21/31144 ,  H01L21/82345 ,  H01L21/823828 ,  H01L21/823842 ,  H01L21/823857 ,  H01L27/088 ,  H01L29/517

Abstract: A manufacturing method of a semiconductor device includes the following steps. A barrier layer is formed in a first region and a second region of a semiconductor substrate. The barrier layer formed in the first region is thinned before a step of forming a first work function layer on the barrier layer. The first work function layer formed on the first region is then removed. The process of thinning the barrier layer in the first region and the process of removing the first work function layer in the first region are performed separately for ensuring the coverage of the first work function layer in the second region. The electrical performance of the semiconductor device and the uniformity of the electrical performance of the semiconductor device may be improved accordingly.

公开(公告)号：US20250063776A1

公开(公告)日：2025-02-20

申请号：US18373953

申请日：2023-09-27

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Hsin-Yu Chen ,  Chun-Hao Lin ,  Yuan-Ting Chuang ,  Shou-Wei Hsieh

IPC: H01L29/06 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78

Abstract: A semiconductor device includes a semiconductor substrate, an isolation structure, and a first electrically conductive structure. The semiconductor substrate has a planar device region and a fin device region. The semiconductor substrate includes a mesa structure disposed in the planar device region and fin-shaped structures disposed in the fin device region. The isolation structure is disposed on the semiconductor substrate and includes a first portion which is disposed on the planar device region and covers a sidewall of the mesa structure, and the isolation structure further includes a second portion which is disposed on the fin device region and located between the fin-shaped structures. The first electrically conductive structure is disposed on the planar device region. The first electrically conductive structure is partly disposed above the mesa structure in a vertical direction and partly disposed above the first portion of the isolation structure in the vertical direction.

公开(公告)号：US20240162220A1

公开(公告)日：2024-05-16

申请号：US18078064

申请日：2022-12-08

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Hsin-Yu Chen ,  Chun-Hao Lin ,  Yuan-Ting Chuang ,  Shou-Wei Hsieh

IPC: H01L27/06 ,  H01L21/8234

CPC classification number: H01L27/0629 ,  H01L21/823475 ,  H01L28/75 ,  H01L28/87 ,  H01L28/91

Abstract: A capacitor on a fin structure includes a fin structure. A dielectric layer covers the fin structure. A first electrode extension is embedded within the fin structure. A first electrode penetrates the dielectric layer and contacts the first electrode extension. A second electrode and a capacitor dielectric layer are disposed within the dielectric layer. The capacitor dielectric layer surrounds the second electrode, and the capacitor dielectric layer is between the second electrode and the first electrode extension.

公开(公告)号：US20210210628A1

公开(公告)日：2021-07-08

申请号：US17207751

申请日：2021-03-22

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Cheng-Han Wu ,  Hsin-Yu Chen ,  Chun-Hao Lin ,  Shou-Wei Hsieh ,  Chih-Ming Su ,  Yi-Ren Chen ,  Yuan-Ting Chuang

IPC: H01L29/78 ,  H01L21/762 ,  H01L29/417

Abstract: A semiconductor device includes a fin-shaped structure on the substrate, a shallow trench isolation (STI) around the fin-shaped structure, a single diffusion break (SDB) structure in the fin-shaped structure for dividing the fin-shaped structure into a first portion and a second portion; a first gate structure on the fin-shaped structure, a second gate structure on the STI, and a third gate structure on the SDB structure. Preferably, a width of the third gate structure is greater than a width of the second gate structure and each of the first gate structure, the second gate structure, and the third gate structure includes a U-shaped high-k dielectric layer, a U-shaped work function metal layer, and a low-resistance metal layer.