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    INTERCONNECT STRUCTURE INCLUDING A CONTINUOUS CONDUCTIVE BODY
    11.
    发明申请
    INTERCONNECT STRUCTURE INCLUDING A CONTINUOUS CONDUCTIVE BODY 有权
    互连结构，包括连续导电体

    公开(公告)号：US20140225261A1

    公开(公告)日：2014-08-14

    申请号：US14258175

    申请日：2014-04-22

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Ming Han Lee ,  Hai-Ching Chen ,  Hsiang-Huan Lee ,  Tien-I Bao ,  Chi-Lin Teng

    IPC: H01L23/485 ,  H01L23/482

    CPC classification number: H01L23/4827 ,  H01L21/76807 ,  H01L21/76834 ,  H01L21/76843 ,  H01L21/76852 ,  H01L21/76867 ,  H01L21/76885 ,  H01L21/76897 ,  H01L23/528 ,  H01L23/53233 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Some embodiments of the present disclosure relate to an interconnect structure for connecting devices of a semiconductor substrate. The interconnect structure includes a dielectric layer over the substrate and a continuous conductive body passing through the dielectric layer. The continuous conductive body is made up of a lower body region and an upper body region. The lower body region has a first width defined between opposing lower sidewalls of the continuous conductive body, and the upper body region has a second width defined between opposing upper sidewalls of the continuous conductive body. The second width is less than the first width. A barrier layer separates the continuous conductive body from the dielectric layer.

    Abstract translation: 本公开的一些实施例涉及用于连接半导体衬底的器件的互连结构。 所述互连结构包括在所述衬底上的电介质层和穿过所述电介质层的连续导电体。 连续导电体由下体区域和上体区域构成。 下体区域具有限定在连续导电体的相对的下侧壁之间的第一宽度，并且上体区域具有限定在连续导电体的相对的上侧壁之间的第二宽度。 第二宽度小于第一宽度。 阻挡层将连续导电体与电介质层分开。

    Semiconductor Devices with Air Gate Spacer and Air Gate Cap
    12.
    发明申请
    Semiconductor Devices with Air Gate Spacer and Air Gate Cap 有权

    公开(公告)号：US20210376111A1

    公开(公告)日：2021-12-02

    申请号：US16888138

    申请日：2020-05-29

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Cheng-Chi Chuang ,  Lin-Yu Huang ,  Chia-Hao Chang ,  Yu-Ming Lin ,  Ting-Ya Lo ,  Chi-Lin Teng ,  Hsin-Yen Huang ,  Hai-Ching Chen

    IPC: H01L29/66 ,  H01L29/78 ,  H01L29/49

    Abstract: A method includes providing a structure having a gate stack; first gate spacers; a second gate spacer over one of the first gate spacers and having an upper portion over a lower portion; a dummy spacer; an etch stop layer; and a dummy cap. The method further includes removing the dummy cap, resulting in a first void above the gate stack and between the first gate spacers; removing the dummy spacer, resulting in a second void above the lower portion and between the etch stop layer and the upper portion; depositing a layer of a decomposable material into the first and the second voids; depositing a seal layer over the etch stop layer, the first and the second gate spacers, and the layer of the decomposable material; and removing the layer of the decomposable material, thereby reclaiming at least portions of the first and the second voids.

    Capping layer overlying dielectric structure to increase reliability
    17.
    发明授权
    Capping layer overlying dielectric structure to increase reliability 有权

    公开(公告)号：US11355430B2

    公开(公告)日：2022-06-07

    申请号：US16885378

    申请日：2020-05-28

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Ting-Ya Lo ,  Chi-Lin Teng ,  Hai-Ching Chen ,  Hsin-Yen Huang ,  Shau-Lin Shue ,  Shao-Kuan Lee ,  Cheng-Chin Lee

    IPC: H01L23/522 ,  H01L23/538 ,  H01L21/768

    Abstract: Some embodiments relate to a semiconductor structure including an inter-level dielectric (ILD) layer overlying a substrate. A conductive via is disposed within the ILD layer. A plurality of conductive wires overlie the ILD layer. The plurality of conductive wires includes a first conductive wire laterally offset a second conductive wire. A dielectric structure is disposed laterally between the first and second conductive wires. The dielectric structure includes a first dielectric liner, a dielectric layer, and an air-gap. The air-gap is disposed between an upper surface of the first dielectric liner and a lower surface of the dielectric layer. A dielectric capping layer is disposed along an upper surface of the dielectric structure. The dielectric capping layer continuously extends between opposing sidewalls of the dielectric structure and is laterally offset from the plurality of conductive wires.

    Dielectric capping structure overlying a conductive structure to increase stability
    18.
    发明授权
    Dielectric capping structure overlying a conductive structure to increase stability 有权

    公开(公告)号：US11322395B2

    公开(公告)日：2022-05-03

    申请号：US16876432

    申请日：2020-05-18

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Hsin-Yen Huang ,  Chi-Lin Teng ,  Hai-Ching Chen ,  Shau-Lin Shue ,  Shao-Kuan Lee ,  Cheng-Chin Lee ,  Ting-Ya Lo

    IPC: H01L21/768 ,  H01L23/532 ,  H01L23/528

    Abstract: Some embodiments relate to a semiconductor structure including a first inter-level dielectric (ILD) structure overlying a substrate. A conductive contact directly overlies the substrate and is disposed within the first ILD structure. A conductive wire directly overlies the conductive contact. A conductive capping layer overlies the conductive wire such that the conductive capping layer continuously extends along an upper surface of the conductive wire. A second ILD structure overlies the conductive capping layer. The second ILD structure is disposed along opposing sides of the conductive wire. A pair of air-gaps are disposed within the second ILD structure. The conductive wire is spaced laterally between the pair of air-gaps. A dielectric capping layer is disposed along an upper surface of the conductive capping layer. The dielectric capping layer is spaced laterally between the pair of air-gaps and is laterally offset from an upper surface of the first ILD structure.

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