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公开(公告)号：US09123617B2
公开(公告)日：2015-09-01
申请号：US14531820
申请日：2014-11-03
发明人： Meng-Hsun Wan , Yi-Shin Chu , Szu-Ying Chen , Pao-Tung Chen , Jen-Cheng Liu , Dun-Nian Yaung
IPC分类号： H01L21/00 , H01L27/146 , H01L31/0352 , H01L31/18
CPC分类号： H01L27/14632 , H01L27/14621 , H01L27/14627 , H01L27/1463 , H01L27/14634 , H01L27/14636 , H01L27/1464 , H01L27/14645 , H01L27/14685 , H01L27/14687 , H01L27/14689 , H01L27/1469 , H01L31/022466 , H01L31/035218 , H01L31/03762 , H01L31/18 , H04N5/378
摘要： A device includes an image sensor chip having formed therein an elevated photodiode, and a device chip underlying and bonded to the image sensor chip. The device chip has a read out circuit electrically connected to the elevated photodiode.
摘要翻译： 一种器件包括在其中形成有升高的光电二极管的图像传感器芯片，以及下面并结合到图像传感器芯片的器件芯片。 器件芯片具有电连接到升高的光电二极管的读出电路。
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公开(公告)号：US12125934B2
公开(公告)日：2024-10-22
申请号：US17213961
申请日：2021-03-26
发明人： Yi-Shin Chu , Hsiang-Lin Chen , Yin-Kai Liao , Sin-Yi Jiang , Kuan-Chieh Huang
CPC分类号： H01L31/1812 , H01L31/02016 , H01L31/1864 , H01L31/1868
摘要： A method of manufacturing a semiconductor structure includes: forming a light-absorption layer in a substrate; forming a first doped region of a first conductivity type and a second doped region of a second conductivity type in the light-absorption layer adjacent to the first doped region; depositing a first patterned mask layer over the light-absorption layer, wherein the first patterned mask layer includes an opening exposing the second doped region and covers the first doped region; forming a first silicide layer in the opening on the second doped region; depositing a barrier layer over the first doped region; and annealing the barrier layer to form a second silicide layer on the first doped region.
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公开(公告)号：US20220208651A1
公开(公告)日：2022-06-30
申请号：US17696357
申请日：2022-03-16
发明人： Min-Feng Kao , Dun-Nian Yaung , Hsing-Chih Lin , Jen-Cheng Liu , Yi-Shin Chu , Ping-Tzu Chen
IPC分类号： H01L23/48 , H01L21/768 , H01L23/00 , H01L25/065 , H01L25/00
摘要： The present disclosure, in some embodiments, relates to an integrated chip structure. The integrated chip structure includes a standard contact disposed within a dielectric structure on a substrate. An oversized contact is disposed within the dielectric structure and is laterally separated from the standard contact. The oversized contact has a larger width than the standard contact. An interconnect wire vertically contacts the oversized contact. A through-substrate via (TSV) vertically extends through the substrate. The TSV physically and vertically contacts the oversized contact or the interconnect wire. The TSV vertically overlaps the oversized contact or the interconnect wire over a non-zero distance.
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14.发明申请公开(公告)号：US20210305678A1
公开(公告)日：2021-09-30
申请号：US17149853
申请日：2021-01-15
发明人： Po-Hsiang Huang , Fong-Yuan Chang , Tsui-Ping Wang , Yi-Shin Chu
摘要： A 3D IC package is provided. The 3D IC package includes: a first IC die comprising a first substrate at a back side of the first IC die; a second IC die stacked at the back side of the first IC die and facing the first substrate; a TSV through the first substrate and electrically connecting the first IC die and the second IC die, the TSV having a TSV cell including a TSV cell boundary surrounding the TSV; and a protection module fabricated in the first substrate, wherein the protection module is electrically connected to the TSV, and the protection module is within the TSV cell.
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公开(公告)号：US20170092679A1
公开(公告)日：2017-03-30
申请号：US15378906
申请日：2016-12-14
发明人： Meng-Hsun Wan , Yi-Shin Chu , Szu-Ying Chen , Pao-Tung Chen , Jen-Cheng Liu , Dun-Nian Yaung
IPC分类号： H01L27/146 , H04N5/378
CPC分类号： H01L27/14632 , H01L27/14621 , H01L27/14627 , H01L27/1463 , H01L27/14634 , H01L27/14636 , H01L27/1464 , H01L27/14645 , H01L27/14685 , H01L27/14687 , H01L27/14689 , H01L27/1469 , H01L31/022466 , H01L31/035218 , H01L31/03762 , H01L31/18 , H04N5/378
摘要： A device includes an image sensor chip having formed therein an elevated photodiode, and a device chip underlying and bonded to the image sensor chip. The device chip has a read out circuit electrically connected to the elevated photodiode.
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公开(公告)号：US08933527B2
公开(公告)日：2015-01-13
申请号：US13654159
申请日：2012-10-17
发明人： Yi-Shin Chu , Cheng-Tao Lin , Meng-Hsun Wan , Szu-Ying Chen , Jen-Cheng Liu , Dun-Nian Yaung
IPC分类号： H01L27/146 , H01L31/062
CPC分类号： H01L27/14689 , H01L27/1463 , H01L27/14643 , H01L27/14665 , H01L27/14692 , H01L27/301 , H01L27/307
摘要： A device includes a plurality of isolation spacers, and a plurality of bottom electrodes, wherein adjacent ones of the plurality of bottom electrodes are insulated from each other by respective ones of the plurality of isolation spacers. A plurality of photoelectrical conversion regions overlaps the plurality of bottom electrodes, wherein adjacent ones of the plurality of photoelectrical conversion regions are insulated from each other by respective ones of the plurality of isolation spacers. A top electrode overlies the plurality of photoelectrical conversion regions and the plurality of isolation spacers.
摘要翻译： 一种器件包括多个隔离隔离物和多个底部电极，其中多个底部电极中的相邻的底部电极通过多个隔离隔离物中的相应隔离间隔彼此绝缘。 多个光电转换区域与多个底部电极重叠，其中多个光电转换区域中的相邻光电转换区域通过多个隔离间隔物中的相应隔离间隔彼此绝缘。 顶部电极覆盖多个光电转换区域和多个隔离间隔物。
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公开(公告)号：US08878325B2
公开(公告)日：2014-11-04
申请号：US13671330
申请日：2012-11-07
发明人： Meng-Hsun Wan , Yi-Shin Chu , Szu-Ying Chen , Pao-Tung Chen , Jen-Cheng Liu , Dun-Nian Yaung
IPC分类号： H01L31/02 , H01L31/0224
CPC分类号： H01L27/14632 , H01L27/14621 , H01L27/14627 , H01L27/1463 , H01L27/14634 , H01L27/14636 , H01L27/1464 , H01L27/14645 , H01L27/14685 , H01L27/14687 , H01L27/14689 , H01L27/1469 , H01L31/022466 , H01L31/035218 , H01L31/03762 , H01L31/18 , H04N5/378
摘要： A device includes an image sensor chip having formed therein an elevated photodiode, and a device chip underlying and bonded to the image sensor chip. The device chip has a read out circuit electrically connected to the elevated photodiode.
摘要翻译： 一种器件包括在其中形成有升高的光电二极管的图像传感器芯片，以及下面并结合到图像传感器芯片的器件芯片。 器件芯片具有电连接到升高的光电二极管的读出电路。
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18.发明公开公开(公告)号：US20240120639A1
公开(公告)日：2024-04-11
申请号：US18448045
申请日：2023-08-10
发明人： Po-Hsiang Huang , Fong-Yuan Chang , Tsui-Ping Wang , Yi-Shin Chu
CPC分类号： H01Q1/2283 , H01L23/66 , H01Q1/50 , H01Q23/00
摘要： A 3D IC package is provided. The 3D IC package includes: a first IC die comprising a first substrate at a back side of the first IC die; a second IC die stacked at the back side of the first IC die and facing the first substrate; a TSV through the first substrate and electrically connecting the first IC die and the second IC die, the TSV having a TSV cell including a TSV cell boundary surrounding the TSV; and a protection module fabricated in the first substrate, wherein the protection module is electrically connected to the TSV, and the protection module is within the TSV cell.
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公开(公告)号：US20230369293A1
公开(公告)日：2023-11-16
申请号：US18358186
申请日：2023-07-25
发明人： Min-Feng Kao , Dun-Nian Yaung , Hsing-Chih Lin , Jen-Cheng Liu , Yi-Shin Chu , Ping-Tzu Chen , Che-Wei Chen
IPC分类号： H01L25/065 , H01L21/768 , H01L23/48 , H01L23/532 , H01L23/00
CPC分类号： H01L25/0657 , H01L21/76895 , H01L21/76898 , H01L23/481 , H01L23/53228 , H01L23/53257 , H01L24/05 , H01L24/08 , H01L2224/05624 , H01L2224/05684 , H01L2224/08146 , H01L2225/06541
摘要： In some embodiments, the present disclosure relates to a 3D integrated circuit (IC) stack that includes a first IC die bonded to a second IC die. The first IC die includes a first semiconductor substrate, a first interconnect structure arranged on a frontside of the first semiconductor substrate, and a first bonding structure arranged over the first interconnect structure. The second IC die includes a second semiconductor substrate, a second interconnect structure arranged on a frontside of the second semiconductor substrate, and a second bonding structure arranged on a backside of the second semiconductor substrate. The first bonding structure faces the second bonding structure. Further, the 3D IC stack includes a first backside contact that extends from the second bonding structure to the backside of the second semiconductor substrate and is thermally coupled to at least one of the first or second interconnect structures.
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公开(公告)号：US20230343885A1
公开(公告)日：2023-10-26
申请号：US17835049
申请日：2022-06-08
发明人： Hsiang-Lin Chen , Sin-Yi Jiang , Sung-Wen Huang Chen , Yin-Kai Liao , Jung-I Lin , Yi-Shin Chu , Kuan-Chieh Huang
IPC分类号： H01L31/103 , H01L31/0288 , H01L31/18
CPC分类号： H01L31/103 , H01L31/0288 , H01L31/1804
摘要： Image sensors and methods of forming the same are provided. An image sensor according to the present disclosure includes a silicon substrate, a germanium region disposed in the silicon substrate, a doped semiconductor isolation layer disposed between the silicon substrate and the germanium region, a heavily p-doped region disposed on the germanium region, a heavily n-doped region disposed on the silicon substrate, a first n-type well disposed immediately below the germanium region, a second n-type well disposed immediately below the heavily n-doped region, and a deep n-type well disposed below and in contact with the first n-type well and the second n-type well.
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