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公开(公告)号:US20230377621A1
公开(公告)日:2023-11-23
申请号:US18189580
申请日:2023-03-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jaewoo Lee , Yonghun Kim , Kihan Kim , ChangSik Yoo
CPC classification number: G11C7/222 , G11C7/1066 , G11C29/023 , G11C7/1093 , G11C2207/2254
Abstract: A semiconductor device includes: a clock generation circuit configured to output a plurality of clock signals that have different phases to a memory device, an internal clock signal of the memory device being generated responsive to the plurality of clock signals; and a training circuit configured to receive an output signal output based on the internal clock signal from the memory device, to adjust a value of a code used to generate the internal clock signal by adjusting the phase of at least one clock signal among the plurality of clock signals, to determine a final value of the code based on a duty cycle of the output signal, which is changed according to the adjustment of the value of the code, and to write the final value to the memory device.
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公开(公告)号:US11538506B2
公开(公告)日:2022-12-27
申请号:US17356080
申请日:2021-06-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyungjin Kim , Yongjun Kim , Yonghun Kim , Minsu Ahn , Reum Oh , Jinyong Choi
IPC: G11C5/06 , G11C5/02 , H01L23/538 , H01L25/065
Abstract: A semiconductor device includes a cell area in which a plurality of memory cells are arranged in an array structure, and a peripheral area in which circuits configured to drive the memory cells are arranged, the peripheral area being next to the cell area. The cell area is divided into a plurality of banks, and the plurality of banks comprise first banks having a base size and second banks having a size of 1/(2*n) (wherein n is an integer greater than or equal to 1) of the base size. The plurality of banks are arranged in a first direction and a second direction perpendicular to the first direction, and the semiconductor device has a shape of a rectangular chip which is elongated in the second direction.
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