公开(公告)号：US20130346696A1

公开(公告)日：2013-12-26

申请号：US13873972

申请日：2013-04-30

Applicant: SAMSUNG ELECTRONICS CO., LTD. ,  INDUSTRY-ACADEMIA COOPERATION GROUP OF SEJONG UNIVERSITY

Inventor： Jeong Ae Park ,  Sang Oak Woo ,  Seok Yoon Jung ,  Young sik Kim ,  Woo Chan Park

IPC: G06F12/08

CPC classification number: G06F12/0811 ,  G06F12/0846 ,  G06F12/0855 ,  G06F12/0875 ,  G06F2212/455 ,  G06F2212/601

Abstract: A method and apparatus for providing shared caches. A cache memory system may be operated in a first mode or a second mode. When the cache memory system is operated in the first mode, a first cache and a second cache of the cache memory system may be operated independently. When the cache memory system is operated in the second mode, the first cache and the second cache may be shared. In the second mode, at least one bit may overlap tag bits and set index bits among bits of a memory address.

Abstract translation: 一种用于提供共享缓存的方法和装置。 高速缓冲存储器系统可以以第一模式或第二模式操作。 当高速缓冲存储器系统在第一模式下操作时，可以独立地操作高速缓冲存储器系统的第一高速缓存和第二高速缓存。 当高速缓冲存储器系统在第二模式下操作时，可以共享第一高速缓存和第二高速缓存。 在第二模式中，至少一个位可以与存储器地址的位之间的标签位重叠并设置索引位。

公开(公告)号：US10102005B2

公开(公告)日：2018-10-16

申请号：US15375874

申请日：2016-12-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwon Taek Kwon ,  Seok Yoon Jung

IPC: G06F9/38 ,  G06F15/76

Abstract: An external intrinsic interface. A processor may include a core including a plurality of functional units, an intrinsic module located outside the core, and an interface module to perform relaying between the intrinsic module and a functional unit, among the plurality of functional units.

公开(公告)号：US09805502B2

公开(公告)日：2017-10-31

申请号：US13728408

申请日：2012-12-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gyeong Ja Jang ,  Sang Oak Woo ,  Seok Yoon Jung

IPC: G06T17/00 ,  G06T1/60 ,  G09G5/14 ,  G09G5/36 ,  G09G5/393 ,  G09G5/395

CPC classification number: G06T17/00 ,  G06T1/60 ,  G09G5/14 ,  G09G5/363 ,  G09G5/393 ,  G09G5/395

Abstract: A rendering system and method. The rendering system may perform rendering using a rendering context stored in an internal memory. When a rendering context to be used is not available in the internal memory, the rendering system may load the rendering context to be used from an external memory into the internal memory. When an insufficient amount of storage space is available in the internal memory, storage space may be secured by selectively deleting a rendering context from the internal memory, and a requested rendering context stored in the external memory may be loaded into the internal memory.

公开(公告)号：US20130207967A1

公开(公告)日：2013-08-15

申请号：US13677694

申请日：2012-11-15

Applicant: Samsung Electronics Co., Ltd. ,  Industry-Academic Cooperation Foundation, Yons

Inventor： Jeong Soo PARK ,  Won Jong Lee ,  Seok Yoon Jung ,  Jin Woo Kim ,  Jae Ho Nah ,  Jun Ho Park ,  Tack Don Han

IPC: G06T15/06

CPC classification number: G06T15/06

Abstract: Provided is an image processing apparatus. The image processing apparatus may determine whether a ray and a bounding volume including a primitive intersect each other, prior to determining whether the primitive and the ray intersect each other. An intersection test between the bounding volume and the ray may use a small amount of calculation compared to an intersection test between the primitive and the ray and thus, an amount of calculation used for rendering of the image processing apparatus may significantly decrease.

Abstract translation: 提供了一种图像处理装置。 图像处理装置可以在确定原始图像和光线是否彼此相交之前确定包括原色的光线和包围体是否相交。 与原始和射线之间的交叉测试相比，边界体积和射线之间的交叉测试可以使用少量的计算，因此用于渲染图像处理设备的计算量可能会显着降低。

公开(公告)号：US20130176323A1

公开(公告)日：2013-07-11

申请号：US13669918

申请日：2012-11-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung Jin SON ,  Sang Oak Woo ,  Seok Yoon Jung ,  Vladislav Y. Aranov ,  Sergey Y. Belyaev ,  Pavel O. Smirnov

IPC: G06T1/00 ,  G09G5/00

CPC classification number: G09G5/001 ,  G06F9/5038 ,  G06F2209/509 ,  G06T1/20 ,  G06T15/005 ,  G09G5/363 ,  G09G2360/08

Abstract: A method and apparatus for graphic processing using multi-threading are provided. At least one context task, mediation task, and control task are executed by a processor. The at least one context task sequentially generates graphic commands. The mediation task mediates processing of the graphic commands. The mediation task may process a particular graphic command on behalf of the at least one context task, and change a processing order of the graphic commands. The control task transmits the graphic commands to a graphic hardware.

Abstract translation: 提供了一种使用多线程进行图形处理的方法和装置。 处理器执行至少一个上下文任务，中介任务和控制任务。 所述至少一个上下文任务顺序地生成图形命令。 调解任务调解图形命令的处理。 中介任务可以代表至少一个上下文任务处理特定图形命令，并且改变图形命令的处理顺序。 控制任务将图形命令传输到图形硬件。

公开(公告)号：US20130113799A1

公开(公告)日：2013-05-09

申请号：US13657309

申请日：2012-10-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Oak WOO ,  Seok Yoon Jung ,  Shi Hwa Lee

IPC: G06T15/40

CPC classification number: G06T15/005

Abstract: An apparatus and method for tile binning are provided. The tile binning apparatus may include a determination unit to determine whether a triangle obtained as a result of geometric processing includes an abnormal edge, an overlap test unit to perform an overlap test with respect to each edge of the triangle when the abnormal edge is absent from the triangle, and to sort three vertices of the triangle according to Y-axis values and perform the overlap test with respect to each edge of the triangle based on a sorting result when the triangle includes the abnormal edge, and a bin array update unit to update a bin array based on an overlap test result.

Abstract translation: 提供了一种用于瓦片合并的装置和方法。 瓦片装箱装置可以包括：确定单元，用于确定作为几何处理的结果获得的三角形是否包括异常边缘;重叠测试单元，用于当不存在异常边缘时相对于三角形的每个边缘执行重叠测试 并且根据Y轴值对三角形的三个顶点进行排序，并且当三角形包括异常边缘时，基于排序结果，针对三角形的每个边缘执行重叠测试，并且将数组更新单元 基于重叠测试结果更新bin数组。

公开(公告)号：US20140244939A1

公开(公告)日：2014-08-28

申请号：US13966889

申请日：2013-08-14

Applicant: INDUSTRY & ACADEMIC COOPERATION GROUP OF SEJONG UNIVERSITY ,  SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kwon Taek KWON ,  Young Sik Kim ,  Woo Chan Park ,  Young Duke Seo ,  Sang Oak Woo ,  Seok Yoon Jung ,  Duk Ki Hong

IPC: G06F12/08

CPC classification number: G06F12/0875 ,  G06F12/0855

Abstract: A non-blocking texture cache memory for a texture mapping pipeline and an operation method of the non-blocking texture cache memory may include: a retry buffer configured to temporarily store result data according to a hit pipeline or a miss pipeline; a retry buffer lookup unit configured to look up the retry buffer in response to a texture request transferred from a processor; a verification unit configured to verify whether result data corresponding to the texture request is stored in the retry buffer as the lookup result; and an output control unit configured to output the stored result data to the processor when the result data corresponding to the texture request is stored as the verification result.

Abstract translation: 用于纹理映射流水线的非阻塞纹理缓存存储器和非阻塞纹理缓存存储器的操作方法可以包括：重试缓冲器，其被配置为根据命中管道或遗漏流水线临时存储结果数据; 重试缓冲器查找单元，被配置为响应于从处理器传送的纹理请求来查找重试缓冲器; 验证单元，被配置为验证与纹理请求相对应的结果数据是否作为查找结果存储在重试缓冲器中; 以及输出控制单元，被配置为当存储与纹理请求对应的结果数据作为验证结果时，将存储的结果数据输出到处理器。

公开(公告)号：US20130293546A1

公开(公告)日：2013-11-07

申请号：US13835281

申请日：2013-03-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Won Jong Lee ,  Seok Yoon Jung

IPC: G06T1/20

CPC classification number: G06T1/20

Abstract: The GPU including at least one shader processor may assign a vertex shader task and a pixel shader task to the at least one shader processor.

Abstract translation: 包括至少一个着色器处理器的GPU可以将顶点着色器任务和像素着色器任务分配给至少一个着色器处理器。

公开(公告)号：US09672642B2

公开(公告)日：2017-06-06

申请号：US13940780

申请日：2013-07-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jeong Joon Yoo ,  Seok Yoon Jung ,  Seung Won Lee ,  Shi Hwa Lee

IPC: G06T11/20

CPC classification number: G06T11/203 ,  G06T11/20 ,  G09G2360/122

Abstract: An apparatus and method for tile binning with respect to a Bezier curve. The apparatus may include a curve identification unit to identify a Bezier curve included in input data, a bounding box generation unit to generate a plurality of bounding boxes corresponding to the Bezier curve, and a tile binning unit to perform tile binning with respect to the Bezier curve based on the plurality of bounding boxes.

公开(公告)号：US09569813B2

公开(公告)日：2017-02-14

申请号：US13875585

申请日：2013-05-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Jin Son ,  Sang Oak Woo ,  Seok Yoon Jung

IPC: G06T15/00 ,  G06T1/60

CPC classification number: G06T1/60 ,  G06T15/005

Abstract: A method for tile-based rendering may include verifying a size of a memory available in an apparatus for rendering, and determining a number of buffers required for performing a rendering based on graphics data input, and may further include determining a size of a tile to be used for performing the rendering based on the determined number of buffers and the size of the memory available.

Abstract translation: 用于基于瓦片的呈现的方法可以包括验证用于呈现的设备中可用的存储器的大小，以及基于图形数据输入来确定执行渲染所需的缓冲器的数量，并且还可以包括确定块的大小 用于基于确定的缓冲器数量和可用存储器的大小执行渲染。