公开(公告)号：US20220246530A1

公开(公告)日：2022-08-04

申请号：US17579635

申请日：2022-01-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaemin Jung ,  Jeongkyu Ha ,  Sanguk Han

IPC: H01L23/538 ,  H01L25/18 ,  H05K1/18

Abstract: A chip on film (COF) package includes a base film having an upper surface and a lower surface opposite to each other, a bridge film having an edge that overlaps the base film, and an upper surface and a lower surface opposite to each other, a display driver integrated circuit (IC) mounted on the upper surface of the base film, and a heat dissipation member arranged in correspondence with the display driver IC on the lower surface of the base film. The upper surface of the base film and the lower surface of the bridge film adhere to each other in their respective long axis directions, and a long axis length of the bridge film is greater than a long axis length of the base film.

公开(公告)号：US20210013181A1

公开(公告)日：2021-01-14

申请号：US16742341

申请日：2020-01-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sanguk Han ,  Chajea Jo ,  Hyoeun Kim ,  Sunkyoung Seo

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/00

Abstract: A package-on-package type package includes a lower semiconductor package and an upper semiconductor package. The lower semiconductor package includes a first semiconductor device including a through electrode, a second semiconductor device disposed on the first semiconductor device and including a second through electrode electrically connected to the first through electrode, a first molding member covering a sidewall of at least one of the first semiconductor device and the second semiconductor device, a second molding member covering a sidewall of the first molding member, and an upper redistribution layer disposed on the second semiconductor device and electrically connected to the second through electrode.

公开(公告)号：US12230576B2

公开(公告)日：2025-02-18

申请号：US17579635

申请日：2022-01-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaemin Jung ,  Jeongkyu Ha ,  Sanguk Han

IPC: H01L23/538 ,  H01L25/18 ,  H05K1/18 ,  H01L23/00 ,  H01L23/373

Abstract: A chip on film (COF) package includes a base film having an upper surface and a lower surface opposite to each other, a bridge film having an edge that overlaps the base film, and an upper surface and a lower surface opposite to each other, a display driver integrated circuit (IC) mounted on the upper surface of the base film, and a heat dissipation member arranged in correspondence with the display driver IC on the lower surface of the base film. The upper surface of the base film and the lower surface of the bridge film adhere to each other in their respective long axis directions, and a long axis length of the bridge film is greater than a long axis length of the base film.

公开(公告)号：US20250014953A1

公开(公告)日：2025-01-09

申请号：US18764401

申请日：2024-07-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Duckgyu Kim ,  Sanguk Han

IPC: H01L23/13 ,  H01L21/48 ,  H01L21/78 ,  H01L23/498

Abstract: Provided is a semiconductor package including a rewiring structure including a rewiring pattern, and at least one insulating layer, a semiconductor device provided on the rewiring structure, and electrically connected to the rewiring pattern, and a side surface protector covering a first side surface of the semiconductor device, wherein an upper surface of the semiconductor device that is opposite to a lower surface of the semiconductor device facing the rewiring structure and an upper surface of the side surface protector are at the same vertical level and are coplanar with each other, and the side surface protector extends from the insulating layer of the rewiring structure.

公开(公告)号：US12087696B2

公开(公告)日：2024-09-10

申请号：US18095900

申请日：2023-01-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sunkyoung Seo ,  Taehwan Kim ,  Hyunjung Song ,  Hyoeun Kim ,  Wonil Lee ,  Sanguk Han

IPC: H01L23/48 ,  H01L23/00 ,  H01L23/367 ,  H01L23/538

CPC classification number: H01L23/5384 ,  H01L23/367 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/14

Abstract: A semiconductor package includes a package substrate, a lower semiconductor device arranged on the package substrate and including first through electrodes, first lower connection bumps arranged between the package substrate and the lower semiconductor device and electrically connecting the package substrate to the first through electrodes, a connecting substrate arranged on the package substrate and including second through electrodes, second lower connection bumps arranged between the package substrate and the connecting substrate and electrically connecting the package substrate to the second through electrodes, and an upper semiconductor device arranged on the lower semiconductor device and electrically connected to the first through electrodes and the second through electrodes.

公开(公告)号：US11923342B2

公开(公告)日：2024-03-05

申请号：US17705872

申请日：2022-03-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sanguk Han ,  Chajea Jo ,  Hyoeun Kim ,  Sunkyoung Seo

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L25/0657 ,  H01L23/3121 ,  H01L23/3135 ,  H01L24/13

Abstract: A package-on-package type package includes a lower semiconductor package and an upper semiconductor package. The lower semiconductor package includes a first semiconductor device including a through electrode, a second semiconductor device disposed on the first semiconductor device and including a second through electrode electrically connected to the first through electrode, a first molding member covering a sidewall of at least one of the first semiconductor device and the second semiconductor device, a second molding member covering a sidewall of the first molding member, and an upper redistribution layer disposed on the second semiconductor device and electrically connected to the second through electrode.

公开(公告)号：US11574873B2

公开(公告)日：2023-02-07

申请号：US17003639

申请日：2020-08-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sunkyoung Seo ,  Taehwan Kim ,  Hyunjung Song ,  Hyoeun Kim ,  Wonil Lee ,  Sanguk Han

IPC: H01L23/367 ,  H01L23/538 ,  H01L23/00

Abstract: A semiconductor package includes a package substrate, a lower semiconductor device arranged on the package substrate and including first through electrodes, first lower connection bumps arranged between the package substrate and the lower semiconductor device and electrically connecting the package substrate to the first through electrodes, a connecting substrate arranged on the package substrate and including second through electrodes, second lower connection bumps arranged between the package substrate and the connecting substrate and electrically connecting the package substrate to the second through electrodes, and an upper semiconductor device arranged on the lower semiconductor device and electrically connected to the first through electrodes and the second through electrodes.