METHOD FOR TASK GROUP MIGRATION AND ELECTRONIC DEVICE SUPPORTING THE SAME
    11.
    发明申请
    METHOD FOR TASK GROUP MIGRATION AND ELECTRONIC DEVICE SUPPORTING THE SAME 有权
    用于任务组迁移的方法和支持它的电子设备

    公开(公告)号:US20150347184A1

    公开(公告)日:2015-12-03

    申请号:US14722464

    申请日:2015-05-27

    CPC classification number: G06F9/4856 G06F9/5088 Y02D10/32

    Abstract: Provided is a method for task migration in an electronic device. The method includes: assigning a task with a specific function to a first group among groups formed according to a preset criterion; assigning the first group to one of first processing units functionally connected to the electronic device; and migrating, when the first group matches preset criteria of second processing units functionally connected to the electronic device, the first group to one of the second processing units. Based on this, it is possible to create various other embodiments.

    Abstract translation: 提供了一种用于电子设备中的任务迁移的方法。 该方法包括:根据预设的标准将组中具有特定功能的任务分配给组中的第一组; 将所述第一组分配给功能上连接到所述电子设备的第一处理单元之一; 以及当所述第一组匹配与所述电子设备功能性连接的第二处理单元的预设标准时,将所述第一组移动到所述第二处理单元之一。 基于此,可以创建各种其他实施例。

    Memory package and storage device including the same

    公开(公告)号:US11657860B2

    公开(公告)日:2023-05-23

    申请号:US17361780

    申请日:2021-06-29

    CPC classification number: G11C7/1084 G06F3/0656 G06F3/0679 G11C7/222

    Abstract: A memory package includes a package substrate including a redistribution layer and bonding pads connected to the redistribution layer, the redistribution layer including a plurality of signal paths; a buffer chip mounted on the package substrate and including a plurality of chip pads corresponding to a plurality of memory channels; and a plurality of memory chips stacked on the package substrate and divided into a plurality of groups corresponding to the plurality of memory channels, wherein memory chips of a first group, among the plurality of memory chips, are connected to first chip pads of the plurality of chip pads through first wires, and wherein memory chips of a second group, among the plurality of memory chips, are connected to second chip pads of the plurality of chip pads through second wires and at least a portion of the plurality of signal paths.

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