公开(公告)号：US20240006288A1

公开(公告)日：2024-01-04

申请号：US18369684

申请日：2023-09-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junyun Kweon ,  JUMYONG PARK ,  JIN HO AN ,  Dongjoon Oh ,  JEONGGI JIN ,  HYUNSU HWANG

IPC: H01L23/498 ,  H01L23/538 ,  H01L23/00 ,  H01L25/10

CPC classification number: H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L23/49816 ,  H01L2225/1058 ,  H01L2224/16235 ,  H01L2924/182 ,  H01L2224/48228 ,  H01L2224/73204 ,  H01L2225/1023 ,  H01L2225/1035

Abstract: Disclosed are interconnection patterns and semiconductor packages including the same. The interconnection pattern comprises a first dielectric layer, a first interconnection pattern in the first dielectric layer, a first barrier layer between the first interconnection pattern and the first dielectric layer, a first top surface of the first barrier layer located at a level lower than that of a second top surface of the first dielectric layer and lower than that of a third top surface of the first interconnection pattern, a second barrier layer on the first barrier layer, the second barrier layer interposed between the first interconnection pattern and the first dielectric layer, a second dielectric layer on the first dielectric layer, the first interconnection pattern, and the second barrier layer, and a second interconnection pattern formed in the second dielectric layer and electrically coupled to the first interconnection pattern.

公开(公告)号：US20230275052A1

公开(公告)日：2023-08-31

申请号：US18313560

申请日：2023-05-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： JU-IL CHOI ,  UN-BYOUNG KANG ,  JIN HO AN ,  JONGHO LEE ,  JEONGGI JIN ,  ATSUSHI FUJISAKI

IPC: H01L23/00

CPC classification number: H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/03 ,  H01L2224/13113 ,  H01L2224/03614 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/05016 ,  H01L2224/0508 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05144 ,  H01L2224/11849 ,  H01L2224/13026 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13155 ,  H01L2224/13144 ,  H01L2224/13139 ,  H01L2224/13147

Abstract: Semiconductor devices are provided. A semiconductor device includes an insulating layer and a conductive element in the insulating layer. The semiconductor device includes a first barrier pattern in contact with a surface of the conductive element and a surface of the insulating layer. The semiconductor device includes a second barrier pattern on the first barrier pattern. Moreover, the semiconductor device includes a metal pattern on the second barrier pattern. Related semiconductor packages are also provided.

公开(公告)号：US20230010936A1

公开(公告)日：2023-01-12

申请号：US17568355

申请日：2022-01-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JEONGGI JIN ,  GYUHO KANG ,  UNBYOUNG KANG ,  HEEWON KIM ,  JUMYONG PARK ,  HYUNSU HWANG

IPC: H01L23/00 ,  H01L23/48 ,  H01L23/532 ,  H01L23/522

Abstract: A semiconductor chip includes: a semiconductor substrate; a pad insulating layer on the semiconductor substrate; a through electrode which penetrates the semiconductor substrate and the pad insulating layer and includes a conductive plug and a conductive barrier layer surrounding a sidewall of the conductive plug; and a bonding pad which surrounds a sidewall of the through electrode and is spaced apart from the conductive plug with the conductive barrier layer disposed therebetween.