公开(公告)号：US20230017824A1

公开(公告)日：2023-01-19

申请号：US17511540

申请日：2021-10-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heekwon PARK ,  Rekha PITCHUMANI

IPC: G06F3/06

Abstract: A system is disclosed. The system may include a processor and a memory connected to the processor. A first storage device may be connected to the processor. The first storage device may include a first storage portion, which may include a memory page. The first storage portion may extend the memory. A second storage device may also be connected to the processor. The second storage device may also include a second storage portion. The second storage portion may also extend the memory. A load balancing daemon may migrate the memory page from the first storage portion of the first storage device to the second storage portion of the second storage device based at least in part on a first update count of the first storage device and a second update count of the second storage device.

公开(公告)号：US20240338317A1

公开(公告)日：2024-10-10

申请号：US18346698

申请日：2023-07-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heekwon PARK ,  Jongmin GIM ,  Jaemin JUNG ,  Changho CHOI ,  Yang Seok KI

IPC: G06F12/0882 ,  G06F12/0804 ,  G06F13/16

CPC classification number: G06F12/0882 ,  G06F12/0804 ,  G06F13/1668

Abstract: A system and method for page mirroring for storage. In some embodiments, the method includes: reading first data from a persistent memory device; establishing that the first data is stored in a first cache; and copying the first data from the first cache to a system memory, wherein the persistent memory device supports an external protocol and a memory protocol.

公开(公告)号：US20230409196A1

公开(公告)日：2023-12-21

申请号：US17885520

申请日：2022-08-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Tong ZHANG ,  Heekwon PARK ,  Rekha PITCHUMANI ,  Yang Seok KI

IPC: G06F3/06

CPC classification number: G06F3/0604 ,  G06F3/064 ,  G06F3/0689

Abstract: A system is disclosed. The system may include a processor that may issue a byte level protocol request including a byte address. The system may also include a first storage device and a second storage device. The first storage device and the second storage device may support a cache coherent interconnect protocol, the cache coherent interconnect protocol including a block level protocol and a byte level protocol. The first storage device and the second storage device are included in a redundant array of independent disks (RAID). The first storage device may include a first address range, and the second storage device may include a second address range. The second storage device may provide a RAID address range associated with the first address range and the second address range. A decoder associated with the second storage device may be configured to receive the request from the processor. The decoder may determine that the byte address in the RAID address range is associated with a target address range.

公开(公告)号：US20230122094A1

公开(公告)日：2023-04-20

申请号：US18084540

申请日：2022-12-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heekwon PARK ,  Yang Seok KI

IPC: G06F13/42 ,  G06F13/28 ,  G06F12/0811

Abstract: Embodiments of systems and methods for fast input/output (IO) on PCIE devices are described. Such methods include receiving an IO request from a user or application, the IO request comprising instructions for communicating data with a host system, the host system comprising a processing device and a memory device, analyzing information from the IO request in an IO block analyzer to select one of a plurality of communication paths for communicating the data with the host system, defining a routing instruction in a transfer routing information transmitter in response to the selected communication path, communicating the routing instruction in a Transaction Layer Packet (TLP) to an integrated IO (IIO) module of the host system routing the data from the peripheral device to either the processing device or the memory device according to the routing instruction with a data transfer router.

公开(公告)号：US20220391317A1

公开(公告)日：2022-12-08

申请号：US17396550

申请日：2021-08-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heekwon PARK ,  Yang Seok KI

IPC: G06F12/02

Abstract: A method for memory allocation may include determining an amount of use for a first memory page, wherein the first memory page is mapped to a first page group of a first group level, a second memory page may be mapped to a second page group of the first group level, and the first memory page and the second memory page may be mapped to a third page group of a second group level, and selecting, based on an allocation request, the first memory page based on the amount of use. The amount of use may include a first amount of use, and the method may further include determining a second amount of use for the second memory page, wherein the first memory page may be selected based on the first amount of use and the second amount of use.

公开(公告)号：US20220382478A1

公开(公告)日：2022-12-01

申请号：US17393399

申请日：2021-08-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heekwon PARK ,  Rekha PITCHUMANI

IPC: G06F3/06

Abstract: A method for managing a memory system may include monitoring a page of a first memory of a first type, determine a usage of the page based on the monitoring, and migrating the page to a second memory of a second type based on the usage of the page. Monitoring the page may include monitoring a mapping of the page. Monitoring the mapping of the page may include monitoring a mapping of the page from a logical address to a physical address. Determining the usage of the page may include determining an update frequency of the page. Determining the usage of the page may include comparing the update frequency of the page to a threshold. Migrating the page may include sending an interrupt to a device driver. Migrating the page may include setting a write protection status for the page.

公开(公告)号：US20220374149A1

公开(公告)日：2022-11-24

申请号：US17694662

申请日：2022-03-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Zongwang LI ,  Marie Mai NGUYEN ,  Heekwon PARK ,  Mehran ELYASI ,  Rekha PITCHUMANI

IPC: G06F3/06

Abstract: A system is disclosed. A storage device may store a data. A load module may read the data from the storage device based at least in part on an input/output (I/O) request. A scheduler may place the I/O request in a queue for delivery to the load module based at least in part on a size of the I/O request being less than a threshold.

公开(公告)号：US20170344510A1

公开(公告)日：2017-11-30

申请号：US15227961

申请日：2016-08-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heekwon PARK ,  Yang Seok KI

IPC: G06F13/42 ,  G06F12/0811 ,  G06F13/28

Abstract: Embodiments of systems and methods for fast input/output (IO) on PCIE devices are described. Such methods include receiving an IO request from a user or application, the IO request comprising instructions for communicating data with a host system, the host system comprising a processing device and a memory device, analyzing information from the IO request in an IO block analyzer to select one of a plurality of communication paths for communicating the data with the host system, defining a routing instruction in a transfer routing information transmitter in response to the selected communication path, communicating the routing instruction in a Transaction Layer Packet (TLP) to an integrated IO (IIO) module of the host system routing the data from the peripheral device to either the processing device or the memory device according to the routing instruction with a data transfer router.

公开(公告)号：US20170344506A1

公开(公告)日：2017-11-30

申请号：US15227959

申请日：2016-08-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heekwon PARK ,  Yang Seok KI

IPC: G06F13/40 ,  G06F13/42 ,  G06F13/28

CPC classification number: G06F13/4022 ,  G06F13/28 ,  G06F13/4282

Abstract: Embodiments of methods and systems for quality of service (QoS)-aware input/output (IO) management for a Peripheral Component Interconnect Express (PCIe) storage system with reconfigurable multi-ports are described. In an embodiment, a method includes receiving, in a receiver interface, an IO request from a software application, the IO request comprising information for communicating data over a data access port. The method may also include determining, in a transfer mode selector, a transfer mode selection for communicating the data over the data access port, the transfer mode being selected from a throughput-oriented mode, a latency-sensitive mode, or a balanced mode. Additionally, the method may include communicating, by a block distribution unit, the data over the data access port in response to the IO request, and according to the data transfer mode.