公开(公告)号：US20230387191A1

公开(公告)日：2023-11-30

申请号：US18095561

申请日：2023-01-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Intak JEON ,  Hanjin LIM ,  Hyungsuk JUNG

IPC: H10B12/00

CPC classification number: H01L28/75 ,  H10B12/482 ,  H10B12/488 ,  H10B12/315

Abstract: A semiconductor device includes a substrate, a plurality of lower electrodes disposed on the substrate, at least one support layer in contact with the plurality of lower electrodes and extending in a direction, parallel to an upper surface of the substrate, an upper electrode disposed on the plurality of lower electrodes and the at least one support layer, a dielectric layer between the plurality of lower electrodes and the upper electrode and between the at least one support layer and the upper electrode, and a blocking layer disposed between the at least one support layer and the dielectric layer, and including a material having a bandgap energy greater than a bandgap energy of a material of the at least one support layer. The dielectric layer is in contact with the plurality of lower electrodes and is spaced apart from the at least one support layer by the blocking layer.

公开(公告)号：US20200185387A1

公开(公告)日：2020-06-11

申请号：US16441100

申请日：2019-06-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hanjin LIM ,  Kijong PARK ,  Younsoo KIM

IPC: H01L27/108 ,  H01L29/417 ,  H01L49/02

Abstract: Semiconductor devices are provided. The semiconductor devices may include an active pattern on a substrate. The active pattern may include a first source/drain region and a second source/drain region. The semiconductor devices may also include a bit line electrically connected to the first source/drain region, a first connection electrode electrically connected to the second source/drain region, and a capacitor on the first connection electrode. The capacitor may include a first electrode, a second electrode, and a dielectric pattern between the first and second electrodes. A lower portion of the dielectric pattern may overlap a top surface of the first connection electrode, and the first electrode may extend on an upper portion of a sidewall of the first connection electrode.

公开(公告)号：US20150235959A1

公开(公告)日：2015-08-20

申请号：US14625282

申请日：2015-02-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changseok LEE ,  Hyeonjin SHIN ,  Seongjun PARK ,  Donghyun IM ,  Hyun PARK ,  Keunwook SHIN ,  Jongmyeong LEE ,  Hanjin LIM

IPC: H01L23/532 ,  H01L27/108

CPC classification number: H01L23/53276 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53266 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Example embodiments relate to a wiring structure, a method of forming the same, and an electronic device employing the same. The wiring structure includes a first conductive material layer and a nanocrystalline graphene layer on the first conductive material layer in direct contact with the metal layer.

Abstract translation: 示例性实施例涉及布线结构，其形成方法和使用该布线结构的电子设备。 布线结构包括与金属层直接接触的第一导电材料层上的第一导电材料层和纳米晶体石墨烯层。

公开(公告)号：US20240234315A9

公开(公告)日：2024-07-11

申请号：US18403259

申请日：2024-01-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Cheoljin CHO ,  Jungmin PARK ,  Hanjin LIM ,  Jaehyoung CHOI

IPC: H01L23/528

CPC classification number: H01L23/5283 ,  H01L28/60 ,  H01L28/75 ,  H01L28/90

Abstract: A semiconductor device includes a landing pad on a substrate, a lower electrode on the landing pad, the lower electrode including an outer protective layer, a conductive layer between opposing sidewalls of the outer protective layer, and an inner protective layer between opposing sidewalls of the conductive layer, a first supporter pattern on a side surface of the lower electrode, the first supporter pattern including a supporter hole, a dielectric layer on a surface of each of the lower electrode and the first supporter pattern, and an upper electrode on the dielectric layer. The outer protective layer includes titanium oxide, the conductive layer includes titanium nitride, and the inner protective layer includes titanium silicon nitride. In a horizontal cross-sectional view, the outer protective layer has an arc shape that extends between the dielectric layer and the conductive layer.

公开(公告)号：US20240162281A1

公开(公告)日：2024-05-16

申请号：US18474072

申请日：2023-09-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Intak JEON ,  Jaesoon LIM ,  Hanjin LIM ,  Hyungsuk JUNG

IPC: H10B12/00

CPC classification number: H01L28/90 ,  H10B12/315 ,  H10B12/482 ,  H10B12/488

Abstract: A semiconductor device may include a substrate; a plurality of lower electrodes on the substrate; at least one supporter layer in contact with the plurality of lower electrodes; a dielectric layer on the plurality of lower electrodes and the at least one supporter layer; and an upper electrode on the dielectric layer. Each of the plurality of lower electrodes may include a first lower electrode and a second lower electrode on the first lower electrode. The at least one supporter layer may include a first supporter layer in contact with a side surface of an upper region of the first lower electrode. A level of an uppermost end of the second lower electrode may be higher than a level of an upper surface of the first supporter layer.

公开(公告)号：US20240136286A1

公开(公告)日：2024-04-25

申请号：US18403259

申请日：2024-01-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Cheoljin CHO ,  Jungmin PARK ,  Hanjin LIM ,  Jaehyoung CHOI

IPC: H01L23/528

CPC classification number: H01L23/5283 ,  H01L28/60 ,  H01L28/75 ,  H01L28/90

Abstract: A semiconductor device includes a landing pad on a substrate, a lower electrode on the landing pad, the lower electrode including an outer protective layer, a conductive layer between opposing sidewalls of the outer protective layer, and an inner protective layer between opposing sidewalls of the conductive layer, a first supporter pattern on a side surface of the lower electrode, the first supporter pattern including a supporter hole, a dielectric layer on a surface of each of the lower electrode and the first supporter pattern, and an upper electrode on the dielectric layer. The outer protective layer includes titanium oxide, the conductive layer includes titanium nitride, and the inner protective layer includes titanium silicon nitride. In a horizontal cross-sectional view, the outer protective layer has an arc shape that extends between the dielectric layer and the conductive layer.

公开(公告)号：US20240099017A1

公开(公告)日：2024-03-21

申请号：US18141738

申请日：2023-05-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jungmin PARK ,  Hanjin LIM ,  Hyungsuk JUNG

IPC: H10B53/30

CPC classification number: H10B53/30

Abstract: A semiconductor device includes a plurality of memory cells each including a cell transistor and a memcitor connected to the cell transistor, and the memcitor includes an information storage layer including a ferroelectric material, a first electrode and a second electrode connected to both ends of the information storage layer, a fixed layer stacked on the information storage layer and including a paraelectric material or an antiferroelectric material, and a third electrode connected to the fixed layer without contacting the information storage layer.

公开(公告)号：US20240074150A1

公开(公告)日：2024-02-29

申请号：US18320451

申请日：2023-05-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Intak JEON ,  Hanjin LIM ,  Hyungsuk JUNG

IPC: H10B12/00

CPC classification number: H10B12/315 ,  H01L28/40 ,  H10B12/033

Abstract: A semiconductor device includes a lower structure; a lower electrode on the lower structure; an upper electrode covering the lower electrode on the lower structure; and a dielectric structure disposed between the lower electrode and the upper electrode. The dielectric structure includes a first dielectric film including a first material and a second dielectric film including a second material different from the first material. The first dielectric film includes a first surface in contact with or facing the lower electrode and a second surface facing the first surface. The second dielectric film includes a first portion disposed in an opening of the first dielectric film and extending in a direction from the second surface toward the first surface.

公开(公告)号：US20240072105A1

公开(公告)日：2024-02-29

申请号：US18239847

申请日：2023-08-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jungmin PARK ,  Hanjin LIM ,  Hyungsuk JUNG

IPC: H10B12/00

CPC classification number: H01L28/40 ,  H10B12/315

Abstract: An integrated circuit device includes a transistor disposed on a substrate and a capacitor structure electrically connected with the transistor, wherein the capacitor structure includes a first electrode, a dielectric film composite disposed on the first electrode, and a second electrode disposed on the dielectric film composite, and the dielectric film composite includes a first dielectric film including an anti-ferroelectric material, a second dielectric filler distributed and disposed in the first dielectric film, the second dielectric filler including a ferroelectric material, and a third dielectric filler distributed and disposed in the first dielectric film, the third dielectric filler including a paraelectric material and having an average diameter which is less than an average diameter of the second dielectric filler.

公开(公告)号：US20230118003A1

公开(公告)日：2023-04-20

申请号：US17879107

申请日：2022-08-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hanjin LIM ,  Jungmin PARK

IPC: H01L27/11507

Abstract: Disclosed are a semiconductor device and a semiconductor memory device including the same. A semiconductor device may include a first electrode, a second electrode on the first electrode, a ferroelectric layer between the first electrode and the second electrode, an anti-ferroelectric layer in contact with the ferroelectric layer, and an insertion layer spaced apart from the ferroelectric layer and in contact with the anti-ferroelectric layer.