公开(公告)号：US20190246208A1

公开(公告)日：2019-08-08

申请号：US16270175

申请日：2019-02-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myoungwoo NAM ,  Heejin KIM ,  Ochae KWON ,  Chulwoo KIM ,  Joongsam YUN ,  Younghak OH

IPC: H04R3/12 ,  H04R5/04 ,  H04R5/02

Abstract: An electronic device, method, and non-transitory computer-readable recording medium are provided. Electronic device includes first speaker and second speaker arranged in electronic device, processor operatively connected with first speaker and second speaker, and memory operatively connected to the processor, wherein the memory is configured to store instructions executed to enable the processor to detect an orientation or attitude of the electronic device while playing first channel audio data and second channel audio data via the first speaker and the second speaker, and based on at least part of the detected orientation or attitude of the electronic device, keep outputting a first frequency component of the first channel audio data and a second frequency component of the second channel audio data via the first speaker and the second speaker and switch a second frequency component of the first channel audio data and a first frequency component of the second channel audio data.

公开(公告)号：US20210384100A1

公开(公告)日：2021-12-09

申请号：US17307181

申请日：2021-05-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyo-Chang RYU ,  Chulwoo KIM ,  Juhyun LYU ,  Sanghyun LEE ,  Yun Seok CHOI

IPC: H01L23/367 ,  H01L25/065 ,  H01L23/00

Abstract: A semiconductor package includes a first substrate, a first chip structure and a second chip structure spaced apart from each other on the first substrate, a gap region being defined between the first and second chip structures, and a heat dissipation member covering the first chip structure, the second chip structure, and the first substrate, the heat dissipation member including a first trench in an inner top surface of the heat dissipation member, wherein the first trench vertically overlaps with the gap region and has a width greater than a width of the gap region, and wherein the first trench vertically overlaps with at least a portion of a top surface of the first chip structure or a portion of a top surface of the second chip structure.

公开(公告)号：US20210313937A1

公开(公告)日：2021-10-07

申请号：US17176239

申请日：2021-02-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： KYOUNGHO KIM ,  Chulwoo KIM ,  Hyunsu PARK ,  Jin-Cheol SIM

IPC: H03F3/217 ,  H04L25/02 ,  H03F3/45 ,  H03F1/32

Abstract: A signal receiver includes a data sampler receiving a differential input signal having first and second input signals and determining bit values of the differential input signal based on first and second reference voltages, and a reference voltage generator performing a pre-tuning operation and a post-tuning operation to generate the reference voltages. The reference voltage generator performs the pre-tuning operation by generating first and second initial voltages and adjusting one of the initial voltages to generate third and fourth voltages. After the pre-tuning operation, the reference voltage generator performs the post-tuning operation by increasing or decreasing the third voltage to generate the first reference voltage and decreasing or increasing the fourth voltage to generate the second reference voltage based on a comparison result between the third voltage and the first input signal and a second comparison result between the fourth voltage and second input signal.

公开(公告)号：US20170177403A1

公开(公告)日：2017-06-22

申请号：US15361603

申请日：2016-11-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyuok CHOI ,  Heejin KIM ,  Chulwoo KIM ,  Dongjun SHIN ,  Bo-Keun KIM

IPC: G06F9/46 ,  G06F1/16

CPC classification number: G06F9/461 ,  G06F1/1616 ,  G06F1/1641 ,  G06F1/1652 ,  G06F3/016 ,  G06F3/0484 ,  G06F2203/04102

Abstract: A method for performing a task in an electronic device includes: detecting a deformation of at least a part of the electronic device; identifying information on a task which is performed in the electronic device; and restoring the at least a part of the electronic device from which the deformation is detected based on at least the identified information on the task.

公开(公告)号：US20160379968A1

公开(公告)日：2016-12-29

申请号：US15260723

申请日：2016-09-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daewoo SON ,  Chulwoo KIM

IPC: H01L25/00 ,  H01L25/065 ,  H01L23/00 ,  H01L21/48 ,  H01L23/31 ,  H01L23/498 ,  H01L21/56 ,  H01L21/768

CPC classification number: H01L25/50 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/561 ,  H01L21/565 ,  H01L21/76879 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/03 ,  H01L24/09 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/13025 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H05K3/4614 ,  H05K3/4626 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Provided are a hybrid substrate, a semiconductor package including the same, and a method for fabricating the semiconductor package. The hybrid substrate may include an insulation layer, and an organic layer. The insulation layer may include a top, a bottom opposite to the top, and a conductive pattern having different pitches. The organic layer may be connected to the bottom of the insulation layer, and may include a circuit pattern connected to the conductive pattern. The conductive pattern may include a first metal pattern, and a second conductive pattern. The first metal pattern may have a first pitch, and may be disposed in the top of the insulation layer. The second conductive pattern may have a second pitch greater than the first pitch, and may be extended from the first metal pattern to be connected to the circuit pattern through the insulation layer.

Abstract translation: 提供了一种混合基板，包括该混合基板的半导体封装以及该半导体封装的制造方法。 混合基板可以包括绝缘层和有机层。 绝缘层可以包括顶部，与顶部相对的底部，以及具有不同节距的导电图案。 有机层可以连接到绝缘层的底部，并且可以包括连接到导电图案的电路图案。 导电图案可以包括第一金属图案和第二导电图案。 第一金属图案可以具有第一间距，并且可以设置在绝缘层的顶部。 第二导电图案可以具有大于第一间距的第二间距，并且可以从第一金属图案延伸以通过绝缘层连接到电路图案。