公开(公告)号：US20180033733A1

公开(公告)日：2018-02-01

申请号：US15728064

申请日：2017-10-09

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Kyung Seob OH ,  Kyoung Moo HARR ,  Doo Hwan LEE ,  Seung Chul OH ,  Hyoung Joon KIM ,  Yoon Suk CHO

IPC: H01L23/538 ,  H01L23/31

CPC classification number: H01L23/5389 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5386 ,  H01L2224/02379 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/18 ,  H01L2924/18162 ,  H01L2924/3025 ,  H01L2924/3511

Abstract: A fan-out semiconductor package includes a frame having a through hole, a semiconductor chip disposed in the through hole and including connection pads, an encapsulant encapsulating at least a portion of the frame and the semiconductor chip, and a redistribution layer disposed on the frame and the semiconductor chip and including a first region and a second region. In the first region, a first via and a second via, electrically connected to one of the connection pads, disposed in different layers, and connected by a wiring pattern, are disposed. In the second region, a third via and a fourth via, electrically connected to another of the connection pads, disposed in different layers, and connected by the wiring pattern, are disposed. A distance between axes of the first via and the second via is shorter than a distance between axes of the third via and the fourth via.

公开(公告)号：US20160307847A1

公开(公告)日：2016-10-20

申请号：US15076174

申请日：2016-03-21

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Doo Hwan LEE ,  Hyoung Joon KIM ,  Jong Rip KIM ,  Kyung Seob OH ,  Ung Hui SHIN

IPC: H01L23/538 ,  H01L21/683 ,  H01L21/56 ,  H01L21/768 ,  H01L23/31 ,  H01L25/065

CPC classification number: H01L23/5389 ,  H01L21/568 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/544 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L25/105 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24227 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/3025 ,  H01L2924/3511

Abstract: An electronic component package and a method of manufacturing an electronic component package are provided. An electronic component package includes a frame having a cavity, an electronic component disposed in the cavity, a redistribution layer disposed adjacent to the frame and electrically connected to the electronic component, and an encapsulation material encapsulating the electronic component and having an elastic modulus smaller than that of a material constituting the frame.

Abstract translation: 提供电子部件封装和电子部件封装的制造方法。 电子部件封装包括具有空腔的框架，设置在空腔中的电子部件，与框架相邻设置并电连接到电子部件的再分配层，以及封装电子部件的弹性模量小于 构成框架的材料。

公开(公告)号：US20160302308A1

公开(公告)日：2016-10-13

申请号：US14871065

申请日：2015-09-30

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Jeong Ho LEE ,  Young Do KWEON ,  Hyoung Joon KIM ,  Seung Yeop KOOK

IPC: H05K1/14 ,  H05K1/11 ,  H05K1/18 ,  H05K3/36 ,  H05K3/30

CPC classification number: H05K3/4694 ,  H01L21/4857 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5383 ,  H01L23/5385 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2224/1703 ,  H01L2924/15311 ,  H01L2924/3511 ,  H05K3/4602 ,  H05K2201/048 ,  H05K2201/10522 ,  H05K2201/10674

Abstract: There are provided a printed circuit board, an electronic component module and a method of manufacturing the same. The printed circuit board includes a circuit board including a through hole and a first circuit pattern, and a connection board having a microcircuit structure including a second circuit pattern, the connection board accommodated in the through hole.

Abstract translation: 提供了印刷电路板，电子部件模块及其制造方法。 印刷电路板包括具有通孔和第一电路图形的电路板，以及具有包括第二电路图案的微电路结构的连接板，该连接板容纳在通孔中。

公开(公告)号：US20180190602A1

公开(公告)日：2018-07-05

申请号：US15905062

申请日：2018-02-26

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Doo Hwan LEE ,  Jong Rip KIM ,  Hyoung Joon KIM ,  Jin Yul KIM ,  Kyung Seob OH

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/538

Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first interconnection member and the inactive surface of the semiconductor chip; a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip; and a passivation layer disposed on the second interconnection member. The first interconnection member and the second interconnection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip, the second interconnection member includes an insulating layer on which the redistribution layer of the second interconnection member is disposed, and the passivation layer has a modulus of elasticity greater than that of the insulating layer of the second interconnection member.

公开(公告)号：US20180138127A1

公开(公告)日：2018-05-17

申请号：US15853014

申请日：2017-12-22

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Doo Hwan LEE ,  Hyoung Joon KIM ,  Jong Rip KIM ,  Kyung Seob OH ,  Ung Hui SHIN

IPC: H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01L23/552 ,  H01L23/367 ,  H01L21/48 ,  H01L21/56

Abstract: An electronic component package and a method of manufacturing an electronic component package are provided. An electronic component package includes a frame having a cavity, an electronic component disposed in the cavity, a redistribution layer disposed adjacent to the frame and electrically connected to the electronic component, and an encapsulation material encapsulating the electronic component and having an elastic modulus smaller than that of a material constituting the frame.

公开(公告)号：US20170365558A1

公开(公告)日：2017-12-21

申请号：US15420558

申请日：2017-01-31

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Kyung Seob OH ,  Kyoung Moo HARR ,  Doo Hwan LEE ,  Seung Chul OH ,  Hyoung Joon KIM ,  Yoon Suk CHO

IPC: H01L23/538 ,  H01L23/31

CPC classification number: H01L23/5389 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5386 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/18 ,  H01L2924/18162 ,  H01L2924/3511

Abstract: A fan-out semiconductor package includes a frame having a through hole, a semiconductor chip disposed in the through hole and including connection pads, an encapsulant encapsulating at least a portion of the frame and the semiconductor chip, and a redistribution layer disposed on the frame and the semiconductor chip and including a first region and a second region. In the first region, a first via and a second via, electrically connected to one of the connection pads, disposed in different layers, and connected by a wiring pattern, are disposed. In the second region, a third via and a fourth via, electrically connected to another of the connection pads, disposed in different layers, and connected by the wiring pattern, are disposed. A distance between axes of the first via and the second via is shorter than a distance between axes of the third via and the fourth via.

公开(公告)号：US20170103951A1

公开(公告)日：2017-04-13

申请号：US15286253

申请日：2016-10-05

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Doo Hwan LEE ,  Kyung Seob OH ,  Jong Rip KIM ,  Hyoung Joon KIM

IPC: H01L23/538 ,  H01L21/56 ,  H01L21/683 ,  H01L21/48 ,  H01L23/31 ,  H01L23/29

Abstract: A fan-out semiconductor package may include: a first connection member having a through hole; a semiconductor chip disposed in the through hole and having an active surface on which a connection pad is disposed and a non-active surface opposing the active surface; an encapsulant at least partially encapsulating the first connection member and the non-active surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pad, wherein the first connection member includes a first insulating layer, a first redistribution layer embedded in the first insulating layer while contacting the second connection member, and a second redistribution layer disposed on the other side of the first insulating layer opposing one side thereof in which the first redistribution layer is embedded.