公开(公告)号：US09524879B2

公开(公告)日：2016-12-20

申请号：US14669221

申请日：2015-03-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-Su Lee ,  Young-Wook Park ,  Hee-Sook Park ,  Dong-Bok Lee ,  Jong-Myeong Lee

IPC: H01L21/336 ,  H01L21/311 ,  H01L21/768 ,  H01L21/288 ,  H01L21/02 ,  H01L29/423 ,  H01L29/78

CPC classification number: H01L21/31111 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/288 ,  H01L21/76816 ,  H01L21/76843 ,  H01L21/76844 ,  H01L21/76855 ,  H01L21/76879 ,  H01L21/76895 ,  H01L27/10855 ,  H01L29/4236 ,  H01L29/78

Abstract: Semiconductor devices, and methods for fabricating a semiconductor device, include forming a contact hole penetrating an interlayer insulating layer and exposing a conductor defining a bottom surface of the contact hole, forming a sacrificial layer filling the contact hole, forming a first trench overlapping a part of the contact hole by removing at least a part of the sacrificial layer, forming a spacer filling the first trench, forming a second trench by removing a remainder of the sacrificial layer, and forming a metal electrode filling the contact hole and the second trench using electroless plating.

Abstract translation: 半导体器件以及半导体器件的制造方法包括：形成贯穿层间绝缘层的接触孔，露出限定接触孔的底面的导体，形成填充接触孔的牺牲层，形成与第一沟槽重叠的部分 通过去除所述牺牲层的至少一部分，形成填充所述第一沟槽的间隔物，通过去除所述牺牲层的剩余部分形成第二沟槽，以及使用以下方式形成填充所述接触孔和所述第二沟槽的金属电极： 无电镀。

公开(公告)号：US12205952B2

公开(公告)日：2025-01-21

申请号：US18539062

申请日：2023-12-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gihee Cho ,  Sanghyuck Ahn ,  Hyun-Suk Lee ,  Jungoo Kang ,  Jin-Su Lee ,  Hongsik Chae

IPC: H01L27/10 ,  G11C8/14 ,  H01L49/02 ,  H10B12/00

Abstract: A semiconductor device includes; a bottom electrode on a substrate, a supporting pattern between the bottom electrode and an adjacent bottom electrode, a top electrode covering the bottom electrode and the supporting pattern, and a dielectric layer between the bottom electrode and the top electrode and between the supporting pattern and the top electrode. The bottom electrode may include a first portion including a seam and a second portion on the first portion, a top end of the second portion may be disposed at a height lower than an upper surface of the supporting pattern, and a portion of a bottom end of the second portion may be exposed to the seam.

公开(公告)号：US12119374B2

公开(公告)日：2024-10-15

申请号：US17857383

申请日：2022-07-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gihee Cho ,  Sangyeol Kang ,  Jungoo Kang ,  Taekyun Kim ,  Jiwoon Park ,  Sanghyuck Ahn ,  Jin-Su Lee ,  Hyun-Suk Lee ,  Hongsik Chae

IPC: H10B12/00 ,  H01L49/02

CPC classification number: H01L28/92 ,  H10B12/0335 ,  H10B12/053 ,  H10B12/315 ,  H10B12/34 ,  H10B12/482 ,  H10B12/488

Abstract: A semiconductor device and a method of manufacturing the same, the device including a plurality of lower electrodes on a semiconductor substrate; a support pattern connecting the lower electrodes at sides of the lower electrodes; and a dielectric layer covering the lower electrodes and the support pattern, wherein each of the plurality of lower electrodes includes a pillar portion extending in a vertical direction perpendicular to a top surface of the semiconductor substrate; and a protrusion protruding from a sidewall of the pillar portion so as to be in contact with the support pattern, the pillar portion includes a conductive material, the protrusion includes a same conductive material as the pillar portion and is further doped with impurities.

公开(公告)号：US20220037325A1

公开(公告)日：2022-02-03

申请号：US17220411

申请日：2021-04-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun Goo Kang ,  Sang Hyuck Ahn ,  Sang Yeol Kang ,  Jin-Su Lee ,  Hyun-Suk Lee ,  Gi Hee Cho ,  Hong Sik Chae

IPC: H01L27/108 ,  H01L49/02

Abstract: A semiconductor device includes a substrate, first and second supporter patterns stacked sequentially on the substrate in a first direction and spaced apart from an upper surface of the substrate, a lower electrode hole that extends through the first and second supporter patterns on the substrate in the first direction, an interface film on side walls and a bottom surface of the lower electrode hole, a lower electrode inside of the lower electrode hole on the interface film, a capacitor dielectric film that is in physical contact with side walls of the interface film, an uppermost surface of the interface film, and an uppermost surface of the lower electrode, the uppermost surface of the interface film is formed on a same plane as an upper surface of the second supporter pattern.