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公开(公告)号：US12089397B2
公开(公告)日：2024-09-10
申请号：US18318752
申请日：2023-05-17
Applicant: Samsung Electronics Co., Ltd.
Inventor： Chang Mu An , Sang Yeol Kang , Young-Lim Park , Jong-Bom Seo , Se Hyoung Ahn
CPC classification number: H10B12/37
Abstract: Semiconductor device may include a landing pad and a lower electrode that is on and is connected to the landing pad and includes an outer portion and an inner portion inside the outer portion. The outer portion includes first and second regions. The semiconductor devices may also include a dielectric film on the first region of the outer portion on the lower electrode and an upper electrode on the dielectric film. The first region of the outer portion of the lower electrode may include a silicon (Si) dopant, the dielectric film does not extend along the second region of the outer portion. A concentration of the silicon dopant in the first region of the outer portion is different from a concentration of the silicon dopant in the second region of the outer portion and is higher than a concentration of the silicon dopant in the inner portion.
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公开(公告)号：US12230667B2
公开(公告)日：2025-02-18
申请号：US17854679
申请日：2022-06-30
Inventor： Sang Yeol Kang , Kyu Ho Cho , Han Jin Lim , Cheol Seong Hwang
Abstract: A semiconductor device including a switching element on a substrate, a pad isolation layer on the switching element, a conductive pad passing through the pad isolation layer and connected to the switching element, an insulating pattern on the pad isolation layer and having a height greater than a horizontal width, a lower electrode on side surfaces of the insulating pattern on side surfaces of the insulating pattern and in contact with the conductive pad, a capacitor dielectric layer on the lower electrode and having a monocrystalline dielectric layer and a polycrystalline dielectric layer, the monocrystalline dielectric layer being relatively close to side surfaces of the insulating pattern compared to the polycrystalline dielectric layer an upper electrode on the capacitor dielectric layer may be provided.
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公开(公告)号：US11411069B2
公开(公告)日：2022-08-09
申请号：US17030678
申请日：2020-09-24
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sang Yeol Kang , Kyu Ho Cho , Han Jin Lim , Cheol Seong Hwang
IPC: H01L49/02 , H01L27/108
Abstract: A semiconductor device including a switching element on a substrate, a pad isolation layer on the switching element, a conductive pad passing through the pad isolation layer and connected to the switching element, an insulating pattern on the pad isolation layer and having a height greater than a horizontal width, a lower electrode on side surfaces of the insulating pattern on side surfaces of the insulating pattern and in contact with the conductive pad, a capacitor dielectric layer on the lower electrode and having a monocrystalline dielectric layer and a polycrystalline dielectric layer, the monocrystalline dielectric layer being relatively close to side surfaces of the insulating pattern compared to the polycrystalline dielectric layer an upper electrode on the capacitor dielectric layer may be provided.
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公开(公告)号：US11488958B2
公开(公告)日：2022-11-01
申请号：US16916751
申请日：2020-06-30
Applicant: Samsung Electronics Co., Ltd.
Inventor： Chang Mu An , Sang Yeol Kang , Young-Lim Park , Jong-Bom Seo , Se Hyoung Ahn
IPC: H01L25/065 , H01L25/00 , H01L21/768 , H01L23/00 , H01L23/31 , H01L27/108
Abstract: A semiconductor device includes a landing pad on a substrate, a lower electrode on the landing pad, the lower electrode being electrically connected to the landing pad, a dielectric layer on the lower electrode, the dielectric layer extending along a profile of the lower electrode, an upper electrode on the dielectric layer, and an upper plate electrode on the upper electrode and including first fluorine (F) therein, wherein the upper plate electrode includes an interface facing the upper electrode, and wherein the upper plate electrode includes a portion in which a concentration of the first fluorine decreases as a distance from the interface of the upper plate electrode increases.
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公开(公告)号：US20220037325A1
公开(公告)日：2022-02-03
申请号：US17220411
申请日：2021-04-01
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jun Goo Kang , Sang Hyuck Ahn , Sang Yeol Kang , Jin-Su Lee , Hyun-Suk Lee , Gi Hee Cho , Hong Sik Chae
IPC: H01L27/108 , H01L49/02
Abstract: A semiconductor device includes a substrate, first and second supporter patterns stacked sequentially on the substrate in a first direction and spaced apart from an upper surface of the substrate, a lower electrode hole that extends through the first and second supporter patterns on the substrate in the first direction, an interface film on side walls and a bottom surface of the lower electrode hole, a lower electrode inside of the lower electrode hole on the interface film, a capacitor dielectric film that is in physical contact with side walls of the interface film, an uppermost surface of the interface film, and an uppermost surface of the lower electrode, the uppermost surface of the interface film is formed on a same plane as an upper surface of the second supporter pattern.
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Patent Agency Ranking
公开(公告)号：US20210125993A1
公开(公告)日：2021-04-29
申请号：US16916751
申请日：2020-06-30
Applicant: Samsung Electronics Co., Ltd.
Inventor： Chang Mu An , Sang Yeol Kang , Young-Lim Park , Jong-Bom Seo , Se Hyoung Ahn
IPC: H01L27/108
Abstract: A semiconductor device includes a landing pad on a substrate, a lower electrode on the landing pad, the lower electrode being electrically connected to the landing pad, a dielectric layer on the lower electrode, the dielectric layer extending along a profile of the lower electrode, an upper electrode on the dielectric layer, and an upper plate electrode on the upper electrode and including first fluorine (F) therein, wherein the upper plate electrode includes an interface facing the upper electrode, and wherein the upper plate electrode includes a portion in which a concentration of the first fluorine decreases as a distance from the interface of the upper plate electrode increases.
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公开(公告)号：US08790986B2
公开(公告)日：2014-07-29
申请号：US13705320
申请日：2012-12-05
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jae Hyoung Choi , Ki Yeon Park , Joon Kim , Cha Young Yoo , Youn Soo Kim , Ho Jun Kwon , Sang Yeol Kang
IPC: H01L21/20
Abstract: A method of manufacturing a semiconductor device, the method including: preparing a semiconductor substrate including a mold layer and a support layer disposed on the mold layer; forming multiple holes that pass through the mold layer and the support layer; forming multiple bottom electrodes in the holes; exposing at least a portion of the bottom electrodes by removing at least a portion of the mold layer; removing a portion of the bottom electrodes from an exposed surface of the bottom electrodes; and sequentially forming a dielectric layer and a top electrode layer on the bottom electrodes.
Abstract translation: 一种制造半导体器件的方法，所述方法包括：制备包括模层和设置在所述模层上的支撑层的半导体衬底; 形成穿过模层和支撑层的多个孔; 在孔中形成多个底部电极; 通过去除模具层的至少一部分来暴露至少一部分底部电极; 从底部电极的暴露表面去除一部分底部电极; 并且在底部电极上依次形成电介质层和顶部电极层。
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公开(公告)号：US11812601B2
公开(公告)日：2023-11-07
申请号：US17220411
申请日：2021-04-01
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jun Goo Kang , Sang Hyuck Ahn , Sang Yeol Kang , Jin-Su Lee , Hyun-Suk Lee , Gi Hee Cho , Hong Sik Chae
Abstract: A semiconductor device includes a substrate, first and second supporter patterns stacked sequentially on the substrate in a first direction and spaced apart from an upper surface of the substrate, a lower electrode hole that extends through the first and second supporter patterns on the substrate in the first direction, an interface film on side walls and a bottom surface of the lower electrode hole, a lower electrode inside of the lower electrode hole on the interface film, a capacitor dielectric film that is in physical contact with side walls of the interface film, an uppermost surface of the interface film, and an uppermost surface of the lower electrode, the uppermost surface of the interface film is formed on a same plane as an upper surface of the second supporter pattern.
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公开(公告)号：US11711915B2
公开(公告)日：2023-07-25
申请号：US17570477
申请日：2022-01-07
Applicant: Samsung Electronics Co., Ltd.
Inventor： Chang Mu An , Sang Yeol Kang , Young-Lim Park , Jong-Bom Seo , Se Hyoung Ahn
CPC classification number: H10B12/37
Abstract: Semiconductor device may include a landing pad and a lower electrode that is on and is connected to the landing pad and includes an outer portion and an inner portion inside the outer portion. The outer portion includes first and second regions. The semiconductor devices may also include a dielectric film on the first region of the outer portion on the lower electrode and an upper electrode on the dielectric film. The first region of the outer portion of the lower electrode may include a silicon (Si) dopant, the dielectric film does not extend along the second region of the outer portion. A concentration of the silicon dopant in the first region of the outer portion is different from a concentration of the silicon dopant in the second region of the outer portion and is higher than a concentration of the silicon dopant in the inner portion.
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公开(公告)号：US11244946B2
公开(公告)日：2022-02-08
申请号：US16946487
申请日：2020-06-24
Applicant: Samsung Electronics Co., Ltd.
Inventor： Chang Mu An , Sang Yeol Kang , Young-Lim Park , Jong-Bom Seo , Se Hyoung Ahn
IPC: H01L29/76 , H01L27/108 , H01L29/94
Abstract: Semiconductor device may include a landing pad and a lower electrode that is on and is connected to the landing pad and includes an outer portion and an inner portion inside the outer portion. The outer portion includes first and second regions. The semiconductor devices may also include a dielectric film on the first region of the outer portion on the lower electrode and an upper electrode on the dielectric film. The first region of the outer portion of the lower electrode may include a silicon (Si) dopant, the dielectric film does not extend along the second region of the outer portion. A concentration of the silicon dopant in the first region of the outer portion is different from a concentration of the silicon dopant in the second region of the outer portion and is higher than a concentration of the silicon dopant in the inner portion.
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