公开(公告)号：US20250155919A1

公开(公告)日：2025-05-15

申请号：US19026471

申请日：2025-01-17

Applicant: Samsung Display Co., Ltd.

Inventor： SE-BYUNG CHAE

IPC: G06F1/12 ,  G06F1/08 ,  G09G3/32 ,  G09G3/3225

Abstract: A signal generator may include a reference horizontal synchronization signal generation block which generates reference horizontal synchronization signals based on a number of clock signals per a horizontal time, a frame clock calculation block which calculates a first frame clock number based on a number of the clock signals per the horizontal time, a frame clock comparation block which calculates a clock offset by comparing the first frame clock number and a second frame clock number generated based on a number of the clock signals per a frame time, a clock distribution block which generates horizontal synchronization signals by distributing a number of the clock signals corresponding to the clock offset to the reference horizontal synchronization signals, and a vertical synchronization signal generation block which generates a vertical synchronization signal based on the horizontal synchronization signals.

公开(公告)号：US20240177648A1

公开(公告)日：2024-05-30

申请号：US18376468

申请日：2023-10-04

Applicant: Samsung Display Co., Ltd.

Inventor： HYUNCHANG KIM ,  SE-BYUNG CHAE

IPC: G09G3/20 ,  G05F1/46

CPC classification number: G09G3/2096 ,  G05F1/46 ,  G09G3/20 ,  G09G2310/0291 ,  G09G2320/0673 ,  G09G2330/028

Abstract: A power voltage generator includes an analog reference voltage generator configured to generate an analog reference voltage based on a first input voltage, a resistance string configured to generate distribution voltages by performing voltage distribution on the analog reference voltage, a decoding unit configured to generate reference voltages by decoding the distribution voltages, and a regulator unit configured to generate driving voltages based on the reference voltages.

公开(公告)号：US20240096266A1

公开(公告)日：2024-03-21

申请号：US18213897

申请日：2023-06-26

Applicant: Samsung Display Co., Ltd.

Inventor： SANGMIN LEE ,  SE-BYUNG CHAE ,  SUBIN KIM ,  HYUNCHANG KIM

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2310/0275 ,  G09G2310/08 ,  G09G2330/021

Abstract: A data driver includes output channels configured to output data signals, output controllers selectively outputting data signals having a first arrangement or data signals having a second arrangement to output channel groups each of which includes N output channels in response to arrangement control signals, where N is a positive integer greater than or equal to 2, and a control signal generator outputting the arrangement control signals to the output controllers to control the output controllers.

公开(公告)号：US20230367360A1

公开(公告)日：2023-11-16

申请号：US18225693

申请日：2023-07-25

Applicant: Samsung Display Co., Ltd.

Inventor： SE-BYUNG CHAE

IPC: G06F1/12 ,  G06F1/08 ,  G09G3/3225 ,  G09G3/32

CPC classification number: G06F1/12 ,  G06F1/08 ,  G09G3/3225 ,  G09G3/32 ,  G09G2310/08

Abstract: A signal generator may include a reference horizontal synchronization signal generation block which generates reference horizontal synchronization signals based on a number of clock signals per a horizontal time, a frame clock calculation block which calculates a first frame clock number based on a number of the clock signals per the horizontal time, a frame clock comparation block which calculates a clock offset by comparing the first frame clock number and a second frame clock number generated based on a number of the clock signals per a frame time, a clock distribution block which generates horizontal synchronization signals by distributing a number of the clock signals corresponding to the clock offset to the reference horizontal synchronization signals, and a vertical synchronization signal generation block which generates a vertical synchronization signal based on the horizontal synchronization signals.

公开(公告)号：US20230206828A1

公开(公告)日：2023-06-29

申请号：US18145287

申请日：2022-12-22

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： SE-BYUNG CHAE

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2300/0842 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2330/021 ,  G09G2330/028

Abstract: Disclosed is a data driving circuit including a noise filter, first through third voltage generators, and an output circuit. The noise filter receives a driving voltage and removes noise from the driving voltage to output a filtered driving voltage. The first voltage generator outputs a first voltage, a second voltage, and a third voltage. The second voltage generator generates a first reference voltage based on the filtered driving voltage, the first voltage, and the second voltage. The third voltage generator generates a second reference voltage based on the filtered driving voltage, the second voltage, and the third voltage. The output circuit outputs a data signal of a voltage level corresponding to an image signal based on the first reference voltage and the second reference voltage.