公开(公告)号：US08921230B2

公开(公告)日：2014-12-30

申请号：US13964371

申请日：2013-08-12

申请人： Samsung Display Co., Ltd.

发明人： Hong-Sick Park ,  Young-Jun Kim ,  Young-Woo Park ,  Wang-Woo Lee ,  Won-Guk Seo ,  Sam-Young Cho ,  Seung-Yeon Han ,  Gyu-Po Kim ,  Hyun-Cheol Shin ,  Ki-Beom Lee

IPC分类号： H01L21/00 ,  H01L21/67 ,  H01L21/28 ,  H01L27/12 ,  C23F1/18

CPC分类号： C23F1/18 ,  H01L21/67075 ,  H01L27/124 ,  H01L27/1259 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78633 ,  H01L29/7869

摘要： An etchant composition includes about 25 percent by weight to about 35 percent by weight of phosphoric acid, about 3 percent by weight to about 9 percent by weight of nitric acid, about 10 percent by weight to about 20 percent by weight of acetic acid, about 5 percent by weight to about 10 percent by weight of a nitrate, about 6 percent by weight to about 15 percent by weight of a sulfonic acid, about 1 percent by weight to about 5 percent by weight of an amine compound including a carboxyl group, about 0.1 percent by weight to about 1 percent by weight of a water-soluble amino acid, about 0.01 percent by weight to about 1 percent by weight of an azole compound, and water.

摘要翻译： 蚀刻剂组合物包括约25重量％至约35重量％的磷酸，约3重量％至约9重量％的硝酸，约10重量％至约20重量％的乙酸，约 5重量％至10重量％的硝酸盐，约6重量％至约15重量％的磺酸，约1重量％至约5重量％的包含羧基的胺化合物， 约0.1重量％至约1重量％的水溶性氨基酸，约0.01重量％至约1重量％的唑化合物和水。

公开(公告)号：US08552432B2

公开(公告)日：2013-10-08

申请号：US13715726

申请日：2012-12-14

申请人： Samsung Display Co., Ltd.

发明人： Wang-Woo Lee ,  Hong-Sick Park

IPC分类号： H01L31/00

CPC分类号： H01L33/0041 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1292

摘要： A display substrate having a low resistance signal line and a method of manufacturing the display substrate are provided. The display substrate includes an insulation substrate, a gate line, a data line and a pixel electrode. The gate line gate line is formed through a sub-trench and an opening portion. The sub-trench is formed in the insulation substrate and the opening portion is formed through a planarization layer on the insulation substrate at a position corresponding to the position of the sub-trench. The data line crosses the gate line. The pixel electrode is electrically connected to the gate line and the data line through a switching element. Thus, a signal line is formed through a trench formed by using a planarization layer and an insulation substrate, so that a resistance of the signal line may be reduced.