公开(公告)号：US08987118B2

公开(公告)日：2015-03-24

申请号：US14017833

申请日：2013-09-04

Applicant: Samsung Electronics Co., Ltd. ,  Fujifilm Corporation

Inventor： Hyung-Rae Lee ,  Keita Kato ,  Atsushi Nakamura ,  Yool Kang ,  Suk-Koo Hong ,  Jae-Ho Kim ,  Dong-Jun Lee ,  Si-Young Lee

IPC: H01L21/20 ,  H01L29/78 ,  H01L29/66 ,  H01L21/027 ,  H01L21/8238 ,  H01L21/308 ,  G03F7/004 ,  G03F7/039 ,  G03F7/32 ,  G03F7/40 ,  H01L29/165

CPC classification number: H01L29/7848 ,  G03F7/0045 ,  G03F7/0046 ,  G03F7/0397 ,  G03F7/325 ,  G03F7/405 ,  H01L21/0274 ,  H01L21/3083 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823878 ,  H01L29/165 ,  H01L29/66636

Abstract: A method of fabricating a semiconductor device is disclosed comprising the steps of: providing a substrate having a first region, a second region and a plurality of gate electrodes which are formed on the first and second regions of the substrate; forming a mask film to expose the first region of the substrate while covering the second region of the substrate, such that the mask film has a negative lateral profile at a boundary between the first and second regions of the substrate; forming sigma trenches in the first region of the substrate by etching the first region of the substrate using the mask film and the gate electrodes as a mask; and forming an epitaxial layer in each of the sigma trenches.

Abstract translation: 公开了制造半导体器件的方法，包括以下步骤：提供形成在衬底的第一和第二区域上的具有第一区域，第二区域和多个栅电极的衬底; 形成掩模膜以在覆盖基板的第二区域的同时露出基板的第一区域，使得掩模膜在基板的第一和第二区域之间的边界处具有负的横向轮廓; 通过使用掩模膜和栅电极作为掩模蚀刻衬底的第一区域，在衬底的第一区域中形成硅沟槽; 以及在每个σ沟槽中形成外延层。