公开(公告)号：US20150236084A1

公开(公告)日：2015-08-20

申请号：US14703933

申请日：2015-05-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongkyun Park ,  Han-Young Kim ,  Joon Kim ,  Hyun Park ,  Junghwan Oh ,  Minhee Cho

IPC: H01L49/02 ,  H01L21/311 ,  H01L21/285

CPC classification number: H01L28/91 ,  H01L21/28562 ,  H01L21/31116 ,  H01L27/10852

Abstract: A semiconductor device includes a plurality of capacitors disposed on a substrate and a support pattern supporting upper portions and lower portions of the capacitors. Each of the capacitors includes a lower electrode, an upper electrode, and a dielectric layer between the lower and upper electrodes. The lower electrode includes a first electrode portion electrically connected to the substrate and having a solid shape and a second electrode portion stacked on the first electrode portion and having a shape comprising an opening therein. The support pattern includes an upper pattern contacting sidewalls of top end portions of the lower electrodes and a lower pattern vertically spaced apart from the upper pattern. The lower pattern contacts sidewalls under the top end portions of the lower electrodes.

Abstract translation: 半导体器件包括设置在基板上的多个电容器和支撑电容器的上部和下部的支撑图案。 每个电容器包括在下电极和上电极之间的下电极，上电极和电介质层。 下电极包括电连接到基板并具有固体形状的第一电极部分和堆叠在第一电极部分上并具有包括其中的开口的形状的第二电极部分。 支撑图案包括接触下部电极的顶端部的侧壁的上部图案和与上部图案垂直间隔开的下部图案。 下部图案接触下部电极的顶端部分的侧壁。

公开(公告)号：US10446611B2

公开(公告)日：2019-10-15

申请号：US16110518

申请日：2018-08-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Hyun Yoo ,  Eun Mi Kim ,  Joon Kim ,  Chang Hwa Kim ,  Sang Su Park ,  Kyung Rae Byun ,  Sang Hoon Song

IPC: H01L27/146 ,  H01L27/30 ,  H01L27/28 ,  H01L31/0224 ,  H01L31/0216 ,  H01L51/42

Abstract: An image sensor may include a substrate having a plurality of pixel regions in which photoelectric-conversion devices and storage node regions spaced apart from each other; a lower contact via between the photoelectric conversion-devices in the plurality of pixel regions; a first insulating layer on the lower contact via and having an opening; an upper contact via electrically connected to the lower contact via through the first insulating layer and protruding from the first insulating layer; a second insulating layer to surround the first insulating layer and the upper contact via, an upper surface of the second insulating layer in the opening defining a trench; and a color filter filling the trench. A protective film exposing the upper contact via, a first transparent electrode on the protective film and in contact with the upper contact via, and an organic photoelectric layer formed on the first transparent electrode may be provided.

公开(公告)号：US20190131301A1

公开(公告)日：2019-05-02

申请号：US16220109

申请日：2018-12-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong-Kak Lee ,  Joon Kim ,  Bong-hyun Kim ,  Han-Jin Lim

IPC: H01L27/092 ,  H01L27/108 ,  H01L21/28 ,  H01L29/49 ,  H01L29/423 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/10

CPC classification number: H01L27/092 ,  H01L21/28044 ,  H01L21/28061 ,  H01L21/823835 ,  H01L21/823842 ,  H01L27/10808 ,  H01L27/10823 ,  H01L27/10873 ,  H01L29/1037 ,  H01L29/4236 ,  H01L29/4238 ,  H01L29/4925 ,  H01L29/4933 ,  H01L29/4941 ,  H01L29/66575 ,  H01L29/78

Abstract: An electrode structure is disclosed. The electrode structure includes a first polysilicon layer doped with resistance adjustment impurities; a second polysilicon layer for adjusting grains, formed in the first polysilicon layer and doped with grain adjustment impurities; an ohmic metal layer formed on the first and second polysilicon layers; a barrier metal layer formed on the ohmic metal layer; and a metal layer formed on the barrier metal layer.

公开(公告)号：US20190109175A1

公开(公告)日：2019-04-11

申请号：US15953573

申请日：2018-04-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyo Seop Kim ,  Chang Woo Sun ,  Gyu Hwan Oh ,  Joon Kim ,  Joon Youn Hwang

IPC: H01L27/24 ,  H01L45/00 ,  H01L23/525

CPC classification number: H01L27/2427 ,  H01L23/525 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144

Abstract: A semiconductor device is provided including a base insulating layer on a substrate; a first conductive line that extends in a first direction on the base insulating layer; data storage structures on the first conductive line; selector structures on the data storage structures, each of the selector structures including a lower selector electrode, a selector, and an upper selector electrode; an insulating layer in a space between the selector structures; and a second conductive line disposed on the selector structures and the insulating layer and extended in a second direction intersecting the first direction. An upper surface of the insulating layer is higher than an upper surface of the upper selector electrode.

公开(公告)号：US20160247802A1

公开(公告)日：2016-08-25

申请号：US15139360

申请日：2016-04-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong-Kak Lee ,  Joon Kim ,  Bong-hyun Kim ,  Han-Jin Lim

IPC: H01L27/092 ,  H01L29/423 ,  H01L21/28 ,  H01L27/108 ,  H01L29/49 ,  H01L21/8238

CPC classification number: H01L27/092 ,  H01L21/28044 ,  H01L21/28061 ,  H01L21/823835 ,  H01L21/823842 ,  H01L27/10808 ,  H01L27/10823 ,  H01L27/10873 ,  H01L29/1037 ,  H01L29/4236 ,  H01L29/4238 ,  H01L29/4925 ,  H01L29/4933 ,  H01L29/4941 ,  H01L29/66575 ,  H01L29/78

Abstract: An electrode structure is disclosed. The electrode structure includes a first polysilicon layer doped with resistance adjustment impurities; a second polysilicon layer for adjusting grains, formed in the first polysilicon layer and doped with grain adjustment impurities; an ohmic metal layer formed on the first and second polysilicon layers; a barrier metal layer formed on the ohmic metal layer; and a metal layer formed on the barrier metal layer.

公开(公告)号：US20140110824A1

公开(公告)日：2014-04-24

申请号：US14052097

申请日：2013-10-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongkyun Park ,  Han-Young Kim ,  Joon Kim ,  Hyun Park ,  Junghwan Oh ,  Minhee Cho

IPC: H01L49/02

CPC classification number: H01L28/91 ,  H01L21/28562 ,  H01L21/31116 ,  H01L27/10852

Abstract: A semiconductor device includes a plurality of capacitors disposed on a substrate and a support pattern supporting upper portions and lower portions of the capacitors. Each of the capacitors includes a lower electrode, an upper electrode, and a dielectric layer between the lower and upper electrodes. The lower electrode includes a first electrode portion electrically connected to the substrate and having a solid shape and a second electrode portion stacked on the first electrode portion and having a shape comprising an opening therein. The support pattern includes an upper pattern contacting sidewalls of top end portions of the lower electrodes and a lower pattern vertically spaced apart from the upper pattern. The lower pattern contacts sidewalls under the top end portions of the lower electrodes.

Abstract translation: 半导体器件包括设置在基板上的多个电容器和支撑电容器的上部和下部的支撑图案。 每个电容器包括在下电极和上电极之间的下电极，上电极和电介质层。 下电极包括电连接到基板并具有固体形状的第一电极部分和堆叠在第一电极部分上并具有包括其中的开口的形状的第二电极部分。 支撑图案包括接触下部电极的顶端部的侧壁的上部图案和与上部图案垂直间隔开的下部图案。 下部图案接触下部电极的顶端部分的侧壁。